JAJSJ67E may 2020 – july 2023 UCC28782
PRODUCTION DATA
When a short-circuit is applied to the converter output, the peak current reaches the PPL limit and triggers the 160-ms OPP fault timer (except in UCC28781A where the OPP fault timer is always disabled). During this event, the VDD recharge supply is lost due to the auxiliary winding voltage being close to 0 V. Without additional short-circuit detection, if VVDD reaches VVDD(OFF) before the 160-ms timeout, the 1.5-s recovery time for the OPP fault cannot be triggered but only a UVLO recycle is performed. To remedy this scenario, as VVDD reaches VVDD(OFF), the UCC28782 checks two additional parameters to identify the short-circuit event at the output, and triggers the fault response without waiting for 160 ms to expire. Specifically, when VVDD reaches VVDD(OFF), if either VCST is greater than the OPP threshold (VCST(OPP)) or the VS-pin voltage is less than 0.5 V, the 1.5-s recovery delay is initiated for auto-recovery mode. With this additional layer of intelligence, the average load current during continued short-circuit event can be greatly reduced, and thus also the thermal stress on the power supply.