In both buck and buck-boost low-side configurations, the copper area of the switching node DRAIN should be minimized to reduce EMI.
Similarly, the copper area of the FB pin should be minimized to reduce coupling to feedback path. Loop CL, Q1, RFB1 should be minimized to reduce coupling to feedback path.
In high-side buck and buck boost the GND, VDD and FB pins are all part of the switching node so the copper area connected with these pins should be optimized. Large copper area allows better thermal management, but it causes more common mode EMI noise. Use the minimum copper area that is required to handle the thermal dissipation.
Minimum distance between 700-V coated traces is 1.41 mm (60 mils).
11.2 Layout Example
Figure 26 shows and example PCB layout for UCC28881 in low-side buck configuration.