SLUSFZ0 November   2024 UCC33411-Q1

ADVANCE INFORMATION  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Insulation Specifications
    6. 6.6 Safety-Related Certifications
    7. 6.7 Electrical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Enable and Disable
      2. 7.3.2 Output Voltage Soft-Start
      3. 7.3.3 Output Voltage Steady-State Regulation
      4. 7.3.4 Protection Features
        1. 7.3.4.1 Input Under-Voltage and Over-Voltage Lockout
        2. 7.3.4.2 Output Under-Voltage Protection
        3. 7.3.4.3 Output Over-Voltage Protection
        4. 7.3.4.4 Over-Temperature Protection
        5. 7.3.4.5 Fault Reporting and Auto-Restart
      5. 7.3.5 VCC Load Recommended Operating Area
      6. 7.3.6 Electromagnetic Compatibility (EMC) Considerations
    4. 7.4 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
  10. 9 Power Supply Recommendations
  11. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  12. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 Support Resources
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  13. 12Revision History
  14. 13Mechanical and Packaging Information
    1. 13.1 Mechanical Data

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ（パッケージ｜ピン）
  • DHA|16
サーマルパッド・メカニカル・データ
発注情報

7.1 Overview

The UCC33411-Q1 device integrates a high-efficiency, low-emissions isolated DC/DC converter. Requiring minimum passive componenets to form a completely functional DC/DC power module, the device can deliver a maxiumum power of 1.0W across a 5kVRMS reinforced isolation barrier over a wide range of operating temperatures in a low profile , high power density SOIC - 16-pin package.

The easy-to-use feature, low profile and high power density promotes this device for size limited, cost sensitive systems with a minimum design effort replacing bulky and expensive transformer based designs.

The integrated DC/DC converter uses switched mode operation and proprietary circuit techniques to reduce power losses and boost efficiency across all loading conditions. Specialized control mechanisms, clocking schemes, and the use of an on-chip transformer provide high efficiency and low radiated emissions.

The VINP supply is provided to the primary power controller that switches the power stage connected to the integrated transformer. Power is transferred to the secondary side, rectified, and regulated using a fast hysteritic burst mode control scheme that monitors VCC and ensures it is kept within the hysterisis band under normal and transient loading events while maintaining efficient operation across all loading conditions. The VCC is regulated to 3.3V or 3.7V by SEL pin connection to have enough headrome for a post regulator LDO for tighter regulation or lower output ripple requirement applications .

The device has an enable pin to turn the device on or off depending on the system requirement. Pulling enable pin low will reduce the quiscent current significantly if the system wants to operate in a low power conumption mode. The enable pin can also be used as a fault reporting pin, when connected to 18kΩ, the pin will be pulled low for 200μs for any fault shutdown of the device. The device has a soft-start mechanism for a smooth and fast VCC ramp up with minimum input inrush current to avoid oversizing front-end power supplies powering the device's input.