SLUSFG5 November 2024 UCC33421-Q1
ADVANCE INFORMATION
デバイスごとのパッケージ図は、PDF版データシートをご参照ください。
PIN | MIN | TYP | MAX | UNIT | |
---|---|---|---|---|---|
VVINP | Primary-side input voltage to GNDP | 4.5 | 5.5 | V | |
VEN/FLT | EN/FLT pin voltage to GNDP | 0 | 5.5 | V | |
VVCC | Secondary-side Isolated output voltage to GNDS | 0 | 5.7 | V | |
VSEL | SEL pin input voltage to GNDS | 0 | 5.7 | V | |
PVCC | VCC output power at VINP=5.0V±10%, VCC = 5.0V, TA=25°C - 85°C (1) | 1.5 | W | ||
PVCC | VCC output power at VINP=5.0V±10%, VCC = 5.0V, TA=105°C (1) | 1 | W | ||
PVCC | VCC output power at VINP=5.0V±10%, VCC = 5.0V, TA=125°C (1) | 0.4 | W | ||
Static CMTI | Static Common mode transient immunity rating (dV/dt rate across the isolation barrier) | 250 | V/ns | ||
Dynamic CMTI | Dynamic Common mode transient immunity rating (dV/dt rate across the isolation barrier) | 250 | V/ns | ||
TA | Ambient temperature | –40 | 125 | ℃ | |
TJ | Junction temperature | –40 | 150 | ℃ |