SLUSFL3B June   2024  – October 2024 UCC57102 , UCC57108

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Thermal Information
    4. 5.4 Recommended Operating Conditions
    5. 5.5 Electrical Characteristics
    6. 5.6 Switching Characteristics
    7. 5.7 Timing Diagrams
    8. 5.8 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Input Stage
      2. 6.3.2 Enable Function
      3. 6.3.3 Driver Stage
      4. 6.3.4 Desaturation (DESAT) Protection
      5. 6.3.5 Fault (FLT)
      6. 6.3.6 VREF
      7. 6.3.7 Thermal Shutdown
    4. 6.4 Device Functional Modes
  8. 7  Applications and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 VDD Undervoltage Lockout
      3. 7.2.3 Application Curves
  9. 8 Power Supply Recommendations
  10. 9 Layout
    1. 9.1 Layout Guidelines
    2. 9.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Third-Party Products Disclaimer
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 Support Resources
    4. 10.4 Trademarks
    5. 10.5 Electrostatic Discharge Caution
    6. 10.6 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

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発注情報

6.4 Device Functional Modes

The UCC5710x devices operate in normal mode and UVLO mode (see Section 7.2.2.1 for information on UVLO operation). In normal mode, the output state is dependent on the states of the device and the input pins.

The UCC5710xW features a single, noninverting input, but also contains enable and disable functionality through the EN pin. Setting the EN pin to logic HIGH enables the noninverting input to output on the IN pin.

Table 6-1 UCC5710xB Truth Table

IN

 DESAT INTERNAL TSD

FLT

OUT

H

 L L

Open drain

H

L

 L L

Open drain

L

H

 H L L

L

X

 X H

L

L
Table 6-2 UCC5710xC Truth Table

IN

 DESAT INTERNAL TSD

FLT

OUTH

 OUTL

H

 L L

Open drain

H

 High-impedance

L

 L L

Open drain

High-impedance

 L

H

 H L L

High-impedance

 L

X

 X H

L

High-impedance

 L
Table 6-3 UCC5710xW Truth Table

IN

EN

 DESAT INTERNAL TSD

FLT

OUT

L

H

 L L

Open drain

L

H

H

 L L

Open drain

H
X L X X X L
H

H

 H L L

L

X

H

 X H

L

L