JAJSLS2D march 2013 – april 2021 UCD3138064
PRODUCTION DATA
Up to 32 pins in UCD3138x can be configured in the Global I/O register to serve as a general purpose input or output pins (GPIO). This includes all digital input or output pins except for the RESET pin.
The pins that cannot be configured as GPIO pins are the supply pins, ground pins, ADC-12 analog input pins, EADC analog input pins and the RESET pin. Additional digital pins not listed in this register can be configured through their local configuration registers.
There are two ways to configure and use the digital pins as GPIO pins:
The Global I/O registers offer full control of:
The Global I/O registers include Global I/O EN register, Global I/O OE Register, Global I/O Open Drain Control Register, Global I/O Value Register and Global I/O Read Register.
The following is showing the format of Global I/O EN Register (GLBIOEN) as an example:
BIT NUMBER | 31:0 |
---|---|
Bit Name | GLOBAL_IO_EN |
Access | R/W |
Default | 0000_0000_0000_0000_0000_0000_0000_0000 |
Bits 29-0: GLOBAL_IO_EN – This register enables the global control
of digital I/O pins
0 = Control of IO is done by
the functional block assigned to the IO (Default)
1 = Control of IO is done by Global IO registers. Note that the effect of the
GLBIO register is tied to the pin. If you change the pin function using the
IOMUX register the GLBIO setting does not move with the function but stays with
the pin.
BIT | PIN_NAME |
---|---|
31 | PWM2 |
30 | PWM3 |
29 | FAULT3 |
28 | ADC_EXT_TRIG |
27 | TCK |
26 | TDO |
25 | TMS |
24 | TDI |
23 | SCI_TX1 |
22 | SCI_TX0 |
21 | SCI_RX1 |
20 | SCI_RX0 |
19 | TCAP0 |
18 | PWM1 |
17 | PWM0 |
16 | TCAP1 |
15 | I2C_DATA |
14 | PMBUS_CTRL |
13 | PMBUS_ALERT |
12 | EXT_INT |
11 | FAULT2 |
10 | FAULT1 |
9 | FAULT0 |
8 | SYNC |
7 | DPWM3B |
6 | DPWM3A |
5 | DPWM2B |
4 | DPWM2A |
3 | DPWM1B |
2 | DPWM1A |
1 | DPWM0B |
0 | DPWM0A |