JAJSMV1E March   2005  – November 2021 UCD7100

PRODUCTION DATA  

  1. 特長
  2. アプリケーション
  3. 概要
  4. Revision History
  5. 概要 (続き)
  6. Device Comparison Table
  7. Pin Configuration and Functions
  8. Specifications
    1. 8.1 Absolute Maximum Ratings
    2. 8.2 Handling Ratings
    3. 8.3 Recommended Operating Conditions
    4. 8.4 Thermal Information
    5. 8.5 Electrical Characteristics
    6. 8.6 Typical Characteristics
  9. Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Input
      2. 9.3.2 Current Sensing and Protection
      3. 9.3.3 Handshaking
      4. 9.3.4 Driver Output
      5. 9.3.5 Source/Sink Capabilities During Miller Plateau
      6. 9.3.6 Drive Current and Power Requirements
    4. 9.4 Device Functional Modes
      1. 9.4.1 Operation with VDD < 4.25 V (minimum VDD)
      2. 9.4.2 Operation with IN Pin Open
      3. 9.4.3 Operation with ILIM Pin Open
      4. 9.4.4 Operation with ILIM Pin High
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
      3. 10.2.3 Application Curve
  11. 11Power Supply Recommendations
    1. 11.1 Supply
    2. 11.2 Reference and External Bias Supply
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
    3. 12.3 Thermal Considerations
  13. 13Device and Documentation Support
    1. 13.1 Device Support
      1. 13.1.1 Development Support
    2. 13.2 Third-Party Products Disclaimer
    3. 13.3 Documentation Support
      1. 13.3.1 Related Documentation
    4. 13.4 Receiving Notification of Documentation Updates
    5. 13.5 サポート・リソース
    6. 13.6 Trademarks
    7. 13.7 Glossary
    8. 13.8 Electrostatic Discharge Caution
  14. 14Mechanical, Packaging, and Orderable Information

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ(パッケージ|ピン)
  • PWP|14
サーマルパッド・メカニカル・データ
発注情報

Overview

The UCD7100 is a member of the UCD7K family of digital control compatible drivers for applications utilizing digital control techniques, or applications requiring fast local peak current limit protection.

The UCD7100 is a low-side ±4-A high-current MOSFET gate driver. The UCD7100 allows digital power controllers such as the UCD9110 or UCD9501 to interface to the power stage in single-ended topologies. It provides a cycle-by-cycle current limit function with programmable threshold and a digital output current limit flag, which can be monitored by the host controller. With a fast 25-ns cycle-by-cycle current limit protection, the driver can turn off the power stage in the unlikely event that the digital system cannot respond to a failure situation in time.