The UCD7138 device is a 4-A and 6-A single-channel MOSFET driver with body-diode conduction sensing and reporting and is a high performance driver that allows the Texas Instruments UCD3138A digital PWM controller to achieve advanced synchronous-rectification (SR) control. The device contains a high-speed gate driver, a body-diode conduction-sensing circuit, and a turnon delay optimization circuit. The device is suitable for high-power, high-efficiency isolated converter applications where SR dead-time optimization is desired.
The UCD7138 device offers asymmetrical rail-to-rail 4-A source and 6-A sink peak-current drive capability. The short propagation delay and fast rise and fall time allows efficient operation at high frequencies. An internal high-speed comparator with a –150-mV threshold detects the body-diode conduction and reports the information to the UCD3138A digital-power controller. The UCD7138 device is capable of sensing body-diode conduction time as low as 10 ns. The SR turnon edge is optimized by the UCD7138 device. The SR turnoff edge is optimized by the UCD3138A digital-power controller which analyzes the body-diode conduction information reported by the UCD7138 DTC pin.
The benefits of the chipset include maximizing system efficiency by minimizing body-diode conduction time, robust and fast negative-current protection, and a simple interface.
PART NUMBER | PACKAGE | BODY SIZE (NOM) |
---|---|---|
UCD7138 | WSON (6) | 3.00 mm × 3.00 mm |
Changes from A Revision (April 2015) to B Revision
PIN | TYPE | DESCRIPTION | |
---|---|---|---|
NO. | NAME | ||
1 | IN | I | Input: Gate driver input. This pin should be connected directly to the DPWM output of the digital controller. |
2 | DTC | O | Body-diode conduction-time report: Standard digital IO. Pulled high internally. Output low when the body diode is conducting. This pin should be connected to the DTC0 or DTC1 pin on UCD3138A. |
3 | VCC | P | IC supply: External bias supply input. The supply range is 4.5-V to 18-V. A ceramic bypass capacitor of at least 1 µF should be placed as close as possible to the VCC pin and the thermal pad. Where possible, use thick & wide Cu connections. |
4 | OUT | O | Gate driver output: Integrated push-pull gate driver for one or more external power MOSFETs. Typical 4-A source and 6-A sink capability. This is a rail-to-rail output, with the rails defined by the voltages on VCC and GND. This pin should be connected to the gate terminal of the synchronous rectification MOSFET. |
5 | VD | I | Drain voltage: Connect this pin as close as possible to the controlled-MOSFET drain pad. This pin is internally connected to the diode conduction detection comparator. The comparator has a –0.15-V threshold to detect body-diode conduction. A 20-Ω resistor should be connected between the VD pin and MOSFET drain terminal to limit the current. The maximum voltage of the VD pin should not exceed 45 V. A simple external circuit can enable the usage of much higher voltages, see Figure 34. |
6 | CTRL | I | Rising edge optimization control: Connect this pin to ground to disable rising edge optimization. Leave this pin floating or connect it to logic high to enable rising edge optimization. |
— | Thermal Pad (GND) | — | Exposed thermal pad: The exposed pad on the bottom of the package enhances the thermal performance of the device. This pad is the device ground reference. |
MIN | MAX | UNIT | ||
---|---|---|---|---|
Input voltage | VCC | –0.3 | 20 | V |
IN, CRTL | –0.3 | 3.8 | ||
VD | –1 | 45 | ||
Maximum VCC continuous input current | DC current | 50 | mA | |
Output current, peak (pulse) | 6 | A | ||
Switching frequency, ƒS | 2000 | kHz | ||
Operating junction temperature, TJ | –40 | 125 | °C | |
Lead temperature, soldering, 10 s, T(SOL) | 300 | °C | ||
Storage temperature, Tstg | –65 | 150 | °C |
VALUE | UNIT | |||
---|---|---|---|---|
V(ESD) | Electrostatic discharge | Human body model (HBM), per ANSI/ESDA/JEDEC JS–001, all pins(1) | ±2000 | V |
Charged device model (CDM), per JEDEC specification JESD22-C101, all pins(2) | ±500 |
MIN | NOM | MAX | UNIT | ||
---|---|---|---|---|---|
VCC | VCC input voltage from a low impedance source | 4.5 | 18 | V | |
VIN | Input voltage | 0 | 3.6 | V | |
C(BP) | VCC bypass capacitor | 1 | µF | ||
TJ | Operating junction temperature | –40 | 125 | °C |
THERMAL METRIC(1) | UCD7138 | UNIT | |
---|---|---|---|
DRS (WSON) | |||
6 PINS | |||
RθJA | Junction-to-ambient thermal resistance | 73.4 | °C/W |
RθJC(top) | Junction-to-case (top) thermal resistance | 84.2 | |
RθJB | Junction-to-board thermal resistance | 46.3 | |
ψJT | Junction-to-top characterization parameter | 2.6 | |
ψJB | Junction-to-board characterization parameter | 46.4 | |
RθJC(bot) | Junction-to-case (bottom) thermal resistance | 12.4 |
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
---|---|---|---|---|---|---|
VCC BIAS SUPPLY | ||||||
ICC(UV) | VCC current, undervoltage | VCC = 3.4 V | 122 | 186 | µA | |
ICC(ON) | VCC current, no switching | VCC = 12 V | 0.85 | 1.1 | mA | |
ICC(OPERATE) | VCC current, normal operation (1) | VCC = 12 V, C(LOAD) = 10 nF, ƒ = 100 kHz |
13 | 17 | mA | |
GATE INPUT (IN) | ||||||
VIH | Input signal high threshold | 1.93 | 2.03 | 2.10 | V | |
VIL | Input signal low threshold | 0.98 | 1.03 | 1.08 | V | |
VI(hys) | Input hysteresis | 0.90 | 1.00 | V | ||
DTC OUTPUT | ||||||
VOL(DTC) | Low level output voltage | 0.25 | V | |||
VOH(DTC) | High level output voltage | 2.5 | V | |||
IOH(DTC) | Output sinking current | 4 | mA | |||
IOL(DTC) | Output sourcing current | –4 | mA | |||
VDTC | Maximum DTC pin output voltage | 3.5 | 3.6 | V | ||
UNDERVOLTAGE LOCKOUT SECTION (UVLO) | ||||||
VCC(ON) | VCC turnon threshold | 3.30 | 3.80 | 4.30 | V | |
VCC(OFF) | VCC turnoff threshold | 3.10 | 3.56 | 4.02 | V | |
VCC(hys) | UVLO hysteresis | VCC(hys) = VCC(ON) – VCC(OFF) | 0.24 | V | ||
COMPARATOR | ||||||
VTH | Body diode conduction sensing threshold | –179 | –147 | –113 | mV | |
CI(VD–ground) | Differential input capacitance between VD and ground (1) | VD = –150 mV | 20 | pF | ||
GATE DRIVER | ||||||
VCC-VOH | Output high voltage | IOUT = –10 mA | 0.038 | 0.064 | V | |
VOL | Output low voltage | IOUT = 10 mA | 0.0025 | 0.009 | V | |
R(UP) | Pullup resistance | TA = 25°C, IOUT = –25 mA to –50 mA |
5 | 6.1 | Ω | |
TA = –40°C to 125°C, IOUT = –50 mA |
5 | 6.3 | Ω | |||
R(DOWN) | Pulldown resistance | TA = 25°C, IOUT = 25 mA to 50 mA |
0.31 | 0.44 | Ω | |
TA = –40°C to 125°C, IOUT = 50 mA |
0.33 | 0.45 | Ω | |||
IO(source) | Output peak current (source) (1) | C(LOAD) = 0.22 µF, ƒS = 1 kHz, 5-V output |
–4 | A | ||
IO(sink) | Output peak current (sink) (1) | C(LOAD) = 0.22 µF, ƒS = 1 kHz, 5-V output |
6 | A |
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
---|---|---|---|---|---|---|
tr | Rise time | C(LOAD) =1 nF, VCC = 5 V, See Figure 1 and Figure 24 |
5 | 8 | ns | |
C(LOAD) =1 nF, VCC = 12 V, See Figure 1 and Figure 24 |
4 | 8 | ns | |||
tf | Fall time | C(LOAD)=1 nF, VCC = 5 V, See Figure 1 and Figure 24 |
3.36 | 5 | ns | |
C(LOAD)=1 nF, VCC = 12 V, See Figure 1 and Figure 24 |
3.5 | 5 | ns | |||
tw(VD) | Minimum VD pulse duration (width) that changes the DTC output state | VCC = 5 V | 10 | 23 | ns | |
VCC = 12 V | 10 | 23 | ns | |||
tw(IN) | Minimum IN duration (width) that changes OUT state | VCC = 5 V | 11 | 13 | ns | |
VCC = 12 V | 11 | 13 | ns | |||
td(1) | Gate driver turn on propagation delay | C(LOAD) = 1 nF, VIN = 0 V to 3.3 V, VCC = 5 V, VVD = –0.5 V, See Figure 1 and Figure 24 |
14 | 26.6 | ns | |
C(LOAD) = 1 nF, VIN = 0 V to 3.3 V, VCC = 12 V, VVD = –0.5 V, See Figure 1 and Figure 24 |
14 | 25 | ns | |||
td(2) | Gate driver turn off propagation delay | C(LOAD) = 1 nF, VIN = 3.3 V to 0 V, VCC = 5 V, See Figure 1 and Figure 24 |
14 | 22.9 | ns | |
C(LOAD) = 1 nF, VIN = 3.3 V to 0 V, VCC = 12 V, See Figure 1 and Figure 24 |
14 | 22 | ns | |||
td(COMP) | Body-diode conduction detection-comparator controlled-turnon propagation delay(1) | C(LOAD) = 1 nF, VIN = 3.3 V, VCC = 5 V, VVD = 2 V to –0.5 V, See Figure 24 | 28 | 36 | ns | |
C(LOAD) = 1 nF, VIN = 3.3 V, VCC = 12 V, VVD = 2 V to –0.5 V, See Figure 24 | 26 | 33 | ns | |||
td(DTC) | DTC output propagation delay | VCC = 5 V | 21 | 27 | ns | |
VCC = 12 V | 18 | 25 | ns |
VCC = 3.4 V |
VCC = 12 V | C(LOAD) = 10 nF | ƒ = 100 kHz |
No switching |
VCC = 12 V |