JAJSFV7C September   2016  – March 2020 UCD90160A

PRODUCTION DATA.  

  1. 特長
  2. アプリケーション
  3. 概要
    1.     アプリケーション概略図
  4. 改訂履歴
  5. 概要 (続き)
  6. Pin Configuration and Functions
    1.     Pin Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements
    7. 7.7 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Rail Configuration
      2. 8.3.2 TI Fusion GUI
      3. 8.3.3 PMBus Interface
    4. 8.4 Device Functional Modes
      1. 8.4.1  Power Supply Sequencing
        1. 8.4.1.1 Turn-on Sequencing
        2. 8.4.1.2 Turn-off Sequencing
        3. 8.4.1.3 Sequencing Configuration Options
      2. 8.4.2  Pin-Selected Rail States
      3. 8.4.3  Voltage Monitoring
      4. 8.4.4  Fault Responses and Alert Processing
      5. 8.4.5  Shut Down All Rails and Sequence On (Resequence)
      6. 8.4.6  GPIOs
      7. 8.4.7  GPO Control
      8. 8.4.8  GPO Dependencies
        1. 8.4.8.1 GPO Delays
        2. 8.4.8.2 State Machine Mode Enable
      9. 8.4.9  GPI Special Functions
        1. 8.4.9.1 Fault Shutdown Rails
        2. 8.4.9.2 Configured as Sequencing Debug Pin
        3. 8.4.9.3 Configured as Fault Pin
        4. 8.4.9.4 Cold Boot Mode Enable
      10. 8.4.10 Power Supply Enables
      11. 8.4.11 Cascading Multiple Devices
      12. 8.4.12 PWM Outputs
        1. 8.4.12.1 FPWM1-8
        2. 8.4.12.2 PWM1-4
      13. 8.4.13 Programmable Multiphase PWMs
      14. 8.4.14 Margining
        1. 8.4.14.1 Open-Loop Margining
        2. 8.4.14.2 Closed-Loop Margining
      15. 8.4.15 System Reset Signal
      16. 8.4.16 Watch Dog Timer
      17. 8.4.17 Run Time Clock
      18. 8.4.18 Data and Error Logging to Flash Memory
      19. 8.4.19 Brownout Function
      20. 8.4.20 PMBus Address Selection
      21. 8.4.21 Device Reset
    5. 8.5 Programming
      1. 8.5.1 Device Configuration and Programming
        1. 8.5.1.1 Full Configuration Update While in Normal Mode
      2. 8.5.2 JTAG Interface
      3. 8.5.3 Internal Fault Management and Memory Error Correction (ECC)
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
      4. 9.2.4 Estimating ADC Reporting Accuracy
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12デバイスおよびドキュメントのサポート
    1. 12.1 デバイス・サポート
      1. 12.1.1 デベロッパー・ネットワークの製品に関する免責事項
    2. 12.2 ドキュメントのサポート
      1. 12.2.1 関連資料
    3. 12.3 ドキュメントの更新通知を受け取る方法
    4. 12.4 コミュニティ・リソース
    5. 12.5 商標
    6. 12.6 静電気放電に関する注意事項
    7. 12.7 Glossary
  13. 13メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

Data and Error Logging to Flash Memory

The UCD90160A can log up to 18 faults and the number of device resets to flash memory. Peak voltage measurements are also stored for each rail. To reduce stress on the flash memory, a 30-second timer is started if a measured value exceeds the previously logged value. Only the highest value from the 30-second interval is written from RAM to flash. Data and Error logging to flash memory can be disabled by user so that the data and error are only stored in the SRAM.

Multiple faults can be stored in flash memory and can be accessed over PMBus to help debug power supply bugs or failures. Each logged fault includes:

  • Rail number
  • Fault type
  • Fault time since previous device reset
  • Last measured rail voltage

The total number of device resets is also stored to flash memory. The value can be reset using PMBus.

There are three settings for handling the fault log once it reaches its maximum capacity. These settings allow to keep the latest faults by using a First In, First Out (FIFO) mode.

  • FIFO log disabled - The first 18 faults will be logged. No additional faults will be logged until the fault log is cleared.
  • FIFO log for all faults - The most recent 18 faults will be logged. Once 18 faults are logged, any additional faults will cause the oldest fault log entry to be lost.
  • FIFO log for last half of faults - The first 9 faults will be logged. The most recent 9 faults will also be logged. In the FIFO portion of the log, once 9 faults are logged, any additional faults will cause the oldest fault entry to be lost.

With the brownout function enabled, the run-time clock value, peak monitor values, and faults are only logged to flash when a power-down is detected. The device run-time clock value is stored across resets or power cycles unless the brownout function is disabled, in which case the run-time clock is returned to zero after each reset.

It is also possible to update and calibrate the UCD90160A internal run-time clock via a PMBus host. For example, a host processor with a real-time clock could periodically update the UCD90160A run-time clock to a value that corresponds to the actual date and time. The host must translate the UCD90160A timer value back into the appropriate units, based on the usage scenario chosen. See the REAL_TIME_CLOCK command in the UCD90xxx Sequencer and System Health Controller PMBus Command Reference for more details.