JAJSHD6B August   2016  – May  2019 UCD90320

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
    1.     アプリケーション概略図
  4. 4 改訂履歴
  5. 5 概要(続き)
  6. 6 Pin Configuration and Functions
    1.     Pin Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Non-Volatile Memory Characteristics
    7. 7.7 I2C/PMBus Interface Timing Requirements
    8. 7.8 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 TI Fusion Digital Power Designer software
      2. 8.3.2 PMBUS Interface
      3. 8.3.3 Rail Setup
    4. 8.4 Device Functional Modes
      1. 8.4.1  Rail Monitoring Configuration
      2. 8.4.2  GPI Configuration
      3. 8.4.3  Rail Sequence Configuration
      4. 8.4.4  Fault Responses Configuration
      5. 8.4.5  GPO Configuration
        1. 8.4.5.1 Command Controlled GPO
        2. 8.4.5.2 Logic GPO
      6. 8.4.6  Margining Configuration
      7. 8.4.7  Pin Selected Rail States Configuration
      8. 8.4.8  Watchdog Timer
      9. 8.4.9  System Reset Function
      10. 8.4.10 Cascading Multiple Devices
      11. 8.4.11 Rail Monitoring
      12. 8.4.12 Status Monitoring
      13. 8.4.13 Data and Error Logging to EEPROM Memory
      14. 8.4.14 Black Box First Fault Logging
      15. 8.4.15 PMBus Address Selection
      16. 8.4.16 ADC Reference
      17. 8.4.17 Device Reset
      18. 8.4.18 Brownout
      19. 8.4.19 Internal Fault Management
    5. 8.5 Device Configuration and Programming
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12デバイスおよびドキュメントのサポート
    1. 12.1 コミュニティ・リソース
    2. 12.2 ドキュメントの更新通知を受け取る方法
    3. 12.3 商標
    4. 12.4 静電気放電に関する注意事項
    5. 12.5 Glossary
  13. 13メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

8.4.11 Rail Monitoring

UCD90320 monitors up to 24 analog inputs including voltages, current, and temperature and eight digital inputs for POWER_GOOD. Use either the Fusion GUI or a PMBus interface host to poll data from UCD90320. The Fusion GUI displays monitored rail voltage, current, and temperature information on the Monitor page, as shown in Figure 31. Use polling to debug system-level issues.

UCD90320 fusion_GUI_monitor_page_slusch8.pngFigure 31. Fusion Digital Power Designer software Monitor Page

Table 4. Rail State Value Descriptions

RAIL STATE VALUE CONDITION FOR ENTERING RAIL STATE
IDLE 1 When a turn-ON condition is not met, or when rail is shut down due to a fault, or when the rail is waiting for the turn-ON period to resequence
SEQ_ON 2 Waits for the dependency to be met to assert the enable signal
START_DELAY 3 TON_DELAY to assert the enable signal
RAMP_UP 4 Enable signal is asserted and rail is approaching the power good threshold. If the power good threshold is set to 0 V, the rail stays at this state even if the monitored voltage is higher than 0 V.
REGULATION 5 When the monitoring voltage is higher than the power good threshold when the enable signal is asserted, rails stay at this state even if the voltage is below the power good threshold and continues as long as there is no fault action taken.
SEQ_OFF 6 Wait for the dependency to be met to de-assert the enable signal
STOP_DELAY 7 TOFF_DELAY to de-assert the enable signal
RAMP_DOWN 8 The enable signal is de-asserted and rail is ramping down. This state is available only if TOFF_MAX_WARN_LIMIT is not set to unlimited, or if the turn-off sequence is triggered by a fault action. The rail must not be under fault retry sequence to show this RAMP_DOWN state. Otherwise, the IDLE state is present.