JAJSHD6B August   2016  – May  2019 UCD90320

PRODUCTION DATA.  

  1. 特長
  2. アプリケーション
  3. 概要
    1.     アプリケーション概略図
  4. 改訂履歴
  5. 概要(続き)
  6. Pin Configuration and Functions
    1.     Pin Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Non-Volatile Memory Characteristics
    7. 7.7 I2C/PMBus Interface Timing Requirements
    8. 7.8 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 TI Fusion Digital Power Designer software
      2. 8.3.2 PMBUS Interface
      3. 8.3.3 Rail Setup
    4. 8.4 Device Functional Modes
      1. 8.4.1  Rail Monitoring Configuration
      2. 8.4.2  GPI Configuration
      3. 8.4.3  Rail Sequence Configuration
      4. 8.4.4  Fault Responses Configuration
      5. 8.4.5  GPO Configuration
        1. 8.4.5.1 Command Controlled GPO
        2. 8.4.5.2 Logic GPO
      6. 8.4.6  Margining Configuration
      7. 8.4.7  Pin Selected Rail States Configuration
      8. 8.4.8  Watchdog Timer
      9. 8.4.9  System Reset Function
      10. 8.4.10 Cascading Multiple Devices
      11. 8.4.11 Rail Monitoring
      12. 8.4.12 Status Monitoring
      13. 8.4.13 Data and Error Logging to EEPROM Memory
      14. 8.4.14 Black Box First Fault Logging
      15. 8.4.15 PMBus Address Selection
      16. 8.4.16 ADC Reference
      17. 8.4.17 Device Reset
      18. 8.4.18 Brownout
      19. 8.4.19 Internal Fault Management
    5. 8.5 Device Configuration and Programming
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12デバイスおよびドキュメントのサポート
    1. 12.1 コミュニティ・リソース
    2. 12.2 ドキュメントの更新通知を受け取る方法
    3. 12.3 商標
    4. 12.4 静電気放電に関する注意事項
    5. 12.5 Glossary
  13. 13メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

Data and Error Logging to EEPROM Memory

The UCD90320 provides fault log, device reset counter, and peak readings for each rail. To reduce stress on the EEPROM memory, a 30-second timer is started if a measured value exceeds the previously logged value. Only the highest value from the 30-second interval is written from RAM to EEPROM.

Faults are stored in EEPROM memory and are accessible over PMBus. Each logged fault includes the following information:

  • Rail number
  • Fault type
  • Fault time since previous device reset
  • Last measured rail voltage

The total number of device resets is also stored to EEPROM memory. The value can be reset using PMBus.

The run time clock value is logged into EEPROM when a power down is detected. This allows UCD90320 to preserve the run-time clock value through resets or power cycles.

It is also possible to update and calibrate the UCD90320 internal run-time clock via a PMBus host. For example, a host processor with a real-time clock could periodically update the UCD90320 run-time clock to a value that corresponds to the actual date and time. The host must translate the UCD90320 timer value back into appropriate units, based on the usage scenario chosen. See the REAL_TIME_CLOCK command in the UCD90320 Sequencer and System Health Controller PMBus Command Reference for more details.