JAJSQ97J may 2009 – january 2021 XIO2001
PRODUCTION DATA
This register is used to determine when a downstream write is memory write (MW) or memory write invalidate (MWI).
A posted write TLP will normally be sent as a MW on the PCI bus. It will be sent as a MWI when the following conditions are met:
PCI register offset: | 0Ch | |
Register type: | Read/Write | |
Default value: | 00h |
BIT NUMBER | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RESET STATE | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |