JAJSTL8C February   1997  – October 2024 XTR105

PRODUCTION DATA  

  1.   1
  2. 特長
  3. アプリケーション
  4. 概要
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings #GUID-80F0CD5F-C345-42B2-B6A9-580512790460/R_DESCRIPTION_LI1
    2. 5.2 Recommended Operating Conditions
    3. 5.3 Thermal Information
    4. 5.4 Electrical Characteristics
    5. 5.5 Typical Characteristics
  7. Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Linearization
        1. 6.3.1.1 High-Resistance RTDs
      2. 6.3.2 Voltage Regulator
      3. 6.3.3 Open-Circuit Protection
      4. 6.3.4 Reverse-Voltage Protection
      5. 6.3.5 Surge Protection
    4. 6.4 Device Functional Modes
  8. Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 External Transistor
      2. 7.1.2 Loop Power Supply
      3. 7.1.3 2-Wire and 3-Wire RTD Connections
      4. 7.1.4 Radio Frequency Interference
      5. 7.1.5 Error Analysis
    2. 7.2 Typical Applications
    3. 7.3 Layout
      1. 7.3.1 Layout Guidelines
  9. Device and Documentation Support
    1. 8.1 Documentation Support
      1. 8.1.1 Related Documentation
    2. 8.2 ドキュメントの更新通知を受け取る方法
    3. 8.3 サポート・リソース
    4. 8.4 Trademarks
    5. 8.5 静電気放電に関する注意事項
    6. 8.6 用語集
  10. Revision History
  11. 10Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

Typical Characteristics

at TA = +25°C and V+ = 24V (unless otherwise noted)

XTR105 Transconductance vs
                        Frequency
 
Figure 5-1 Transconductance vs Frequency
XTR105 Common-Mode Rejection vs
                        Frequency
 
Figure 5-3 Common-Mode Rejection vs Frequency
XTR105 Overscale Current vs
                        Temperature
 
Figure 5-5 Overscale Current vs Temperature
XTR105 Input Voltage and Current
                        Noise Density vs Frequency
 
Figure 5-7 Input Voltage and Current Noise Density vs Frequency
XTR105 Input Bias and Offset
                        Current vs Temperature
 
Figure 5-9 Input Bias and Offset Current vs Temperature
XTR105 Input Offset Voltage Drift
                        Production Distribution
 
Figure 5-11 Input Offset Voltage Drift Production Distribution
XTR105 Current Source Drift
                        Production Distribution
 
Figure 5-13 Current Source Drift Production Distribution
XTR105 VREG Output
                        Voltage vs vREG Output Current
 
Figure 5-15 VREG Output Voltage vs vREG Output Current
XTR105 Step Response
 
Figure 5-2 Step Response
XTR105 Power-Supply Rejection vs
                        Frequency
 
Figure 5-4 Power-Supply Rejection vs Frequency
XTR105 Underscale Current vs
                        Temperature
 
Figure 5-6 Underscale Current vs Temperature
XTR105 Zero Output and Reference
                        Current Noise vs Frequency
 
Figure 5-8 Zero Output and Reference Current Noise vs Frequency
XTR105 Zero Output Current Error
                        vs Temperature
 
Figure 5-10 Zero Output Current Error vs Temperature
XTR105 Zero Output Drift
                        Production Distribution
 
Figure 5-12 Zero Output Drift Production Distribution
XTR105 Current Source Matching
                        Drift Production Distribution
 
Figure 5-14 Current Source Matching Drift Production Distribution
XTR105 Reference Current Error vs
                        Temperature
 
Figure 5-16 Reference Current Error vs Temperature