JAJS366D October   2006  – October 2024 XTR111

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Pin Configurations and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Explanation of Pin Functions
      2. 6.3.2 Dynamic Performance
      3. 6.3.3 External Current Limit
      4. 6.3.4 External MOSFET
      5. 6.3.5 Output Error Flag and Disable Input
      6. 6.3.6 Voltage Regulator
      7. 6.3.7 Level Shift of 0V Input and Transconductance Trim
    4. 6.4 Device Functional Modes
  8. 7 Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 Input Voltage
      2. 7.1.2 Error Flag Delay
      3. 7.1.3 Voltage Output Configuration
      4. 7.1.4 4mA-to-20mA Output
    2. 7.2 Typical Applications
      1. 7.2.1 0mA–20mA Voltage-to-Current Converter
        1. 7.2.1.1 Design Requirements
        2. 7.2.1.2 Detailed Design Procedure
        3. 7.2.1.3 Application Curve
      2. 7.2.2 Additional Applications
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
        1. 7.4.1.1 Package and Heat Dissipation
        2. 7.4.1.2 Thermal Pad Guidelines
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 サード・パーティ製品に関する免責事項
    2. 8.2 Documentation Support
      1. 8.2.1 Related Documentation
    3. 8.3 ドキュメントの更新通知を受け取る方法
    4. 8.4 サポート・リソース
    5. 8.5 Trademarks
    6. 8.6 静電気放電に関する注意事項
    7. 8.7 用語集
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

6.3.4 External MOSFET

The XTR111 delivers the precise output current to the IS pin. The voltage at this pin is normally 1.4V less than VVSP.

This output requires an external transistor (QEXT) that forms a cascode for the current output. The transistor must be rated for the maximum possible voltage on VOUT and must dissipate the power generated by the current and the voltage across the transistor.

The gate drive (VG) can drive from close to the positive supply rail to 16V less than the positive supply voltage (VVSP). Most modern MOSFETs accept a maximum VGS of 20V. A protection clamp is only required if a large drain gate capacitance can pulse the gate beyond the rating of the MOSFET. Pulling the OD pin high disables the gate driver and closes a switch connecting an internal 3kΩ resistor from the VSP pin to the VG pin. This resistor discharges the gate of the external FET and closes the channel; see also Figure 6-6.

XTR111 Equivalent Circuit for Gate Drive and Disable Switch Figure 6-6 Equivalent Circuit for Gate Drive and Disable Switch

Table 6-1 lists some example devices in SO-compatible packages, but other devices can be used as well. Avoid external capacitance from IS. This capacitance can be compensated by adding additional capacitance from VG to IS; however, this compensation can slow down the output.

Table 6-1 P-Channel MOSFET (Examples)
MANUFACTURER(1) PART NO. BREAKDOWN VDS PACKAGE C-GATE
Infineon BSP170P –60V SOT-223 328pF
ON Semiconductor NTF2955 –60V SOT-223 492pF
Supertex Inc. TP2510 –100V TO-243AA 80pF
(1) Data from published product data sheet; not ensured.

Select a drain-to-source breakdown voltage high enough for the application. Surge voltage protection can be required for negative overvoltages. For positive overvoltages, use a clamp diode to the 24V supply to help protect the FET from reversing.