JAJS366D
October 2006 – October 2024
XTR111
PRODUCTION DATA
1
1
特長
2
アプリケーション
3
概要
4
Pin Configurations and Functions
5
Specifications
5.1
Absolute Maximum Ratings
5.2
ESD Ratings
5.3
Recommended Operating Conditions
5.4
Thermal Information
5.5
Electrical Characteristics
5.6
Typical Characteristics
6
Detailed Description
6.1
Overview
6.2
Functional Block Diagram
6.3
Feature Description
6.3.1
Explanation of Pin Functions
6.3.2
Dynamic Performance
6.3.3
External Current Limit
6.3.4
External MOSFET
6.3.5
Output Error Flag and Disable Input
6.3.6
Voltage Regulator
6.3.7
Level Shift of 0V Input and Transconductance Trim
6.4
Device Functional Modes
7
Application and Implementation
7.1
Application Information
7.1.1
Input Voltage
7.1.2
Error Flag Delay
7.1.3
Voltage Output Configuration
7.1.4
4mA-to-20mA Output
7.2
Typical Applications
7.2.1
0mA–20mA Voltage-to-Current Converter
7.2.1.1
Design Requirements
7.2.1.2
Detailed Design Procedure
7.2.1.3
Application Curve
7.2.2
Additional Applications
7.3
Power Supply Recommendations
7.4
Layout
7.4.1
Layout Guidelines
7.4.1.1
Package and Heat Dissipation
7.4.1.2
Thermal Pad Guidelines
7.4.2
Layout Example
8
Device and Documentation Support
8.1
Device Support
8.1.1
サード・パーティ製品に関する免責事項
8.2
Documentation Support
8.2.1
Related Documentation
8.3
ドキュメントの更新通知を受け取る方法
8.4
サポート・リソース
8.5
Trademarks
8.6
静電気放電に関する注意事項
8.7
用語集
9
Revision History
10
Mechanical, Packaging, and Orderable Information
パッケージ・オプション
メカニカル・データ(パッケージ|ピン)
DGQ|10
MPDS043F
DRC|10
MPDS117L
サーマルパッド・メカニカル・データ
DGQ|10
PPTD325B
DRC|10
QFND013N
発注情報
jajs366d_oa
jajs366d_pm
7.2.2
Additional Applications
Note: Input offset shifted by 10mV using R4 for zero adjustment range.
Figure 7-6
Precision Current Output With a 16-Bit DAC Voltage Input
Figure 7-7
Voltage Regulator Current Boost Using a Standard NPN Transistor