JAJSO02D September   2005  – November 2023 XTR117

PRODUCTION DATA  

  1.   1
  2. 特長
  3. アプリケーション
  4. 概要
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings #GUID-A1BA2296-600A-4764-BBF1-62E55FF362E3/GUID-7F491310-4E37-4E2F-922E-35EFD7CCE84F
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Reverse-Voltage Protection
      2. 6.3.2 Overvoltage Surge Protection
      3. 6.3.3 VSON Package
    4. 6.4 Device Functional Modes
  8. Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 External Transistor
      2. 7.1.2 Minimum Output Current
      3. 7.1.3 Offsetting the Input
      4. 7.1.4 Radio Frequency Interference
      5. 7.1.5 Maximum Output Current
      6. 7.1.6 Circuit Stability
    2. 7.2 Typical Application
    3. 7.3 Layout
      1. 7.3.1 Layout Guidelines
  9. Device and Documentation Support
    1. 8.1 Related Documentation
    2. 8.2 ドキュメントの更新通知を受け取る方法
    3. 8.3 サポート・リソース
    4. 8.4 Trademarks
    5. 8.5 静電気放電に関する注意事項
    6. 8.6 用語集
  10. Revision History
  11. 10Mechanical, Packaging, and Orderable Information

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ(パッケージ|ピン)
  • DGK|8
  • DRB|8
サーマルパッド・メカニカル・データ
発注情報

VSON Package

The XTR117 is offered in a VSON-8 package (also known as SON or DFN). The VSON is a QFN package with lead contacts on only two sides of the bottom of the package. This leadless package maximizes board space and enhances thermal and electrical characteristics through an exposed pad.

VSON packages are physically small, have a smaller routing area, improved thermal performance, and improved electrical parasitics. Additionally, the absence of external leads eliminates bent-lead issues.

The VSON package can be easily mounted using standard printed circuit board (PCB) assembly techniques. See the QFN/SON PCB Attachment and Quad Flatpack No-Lead Logic Packages application notes, both available for download at www.ti.com.

Connect the exposed leadframe die pad on the bottom of the package to IRET or leave unconnected.