JAJSO02D September 2005 – November 2023 XTR117
PRODUCTION DATA
デバイスごとのパッケージ図は、PDF版データシートをご参照ください。
PIN | TYPE(1) | DESCRIPTION | |
---|---|---|---|
NAME | NO. | ||
IIN | 2 | I | Current input pin |
IRET | 3 | I | Local ground return pin for VREG |
IO | 4 | O | Regulated 4-mA to 20-mA current-loop output |
E (Emitter) | 5 | I | Emitter connection for external transistor |
B (Base) | 6 | O | Base connection for external transistor |
V+ | 7 | P | Loop power supply |
VREG | 8 | O | 5-V regulator voltage output |
NC | 1 | — | Not connected. |
Thermal Pad | Pad | — | Thermal Pad. Connect to IRET or leave floating. |