The CDCM9102 is a low-jitter clock generator designed to provide reference clocks for communications standards such as PCI Express™. The device supports up to PCIE gen3 and is easy to configure and use. The CDCM9102 provides two 100-MHz differential clock ports. The output types supported for these ports include LVPECL, LVDS, or a pair of LVCMOS buffers. HCSL signaling is supported using an AC-coupled network. The user configures the output buffer type desired by strapping device pins. Additionally, a single-ended 25-MHz clock output port is provided. Uses for this port include general-purpose clocking, clocking Ethernet PHYs, or providing a reference clock for additional clock generators. All clocks generated are derived from a single external 25-MHz crystal.
PART NUMBER | PACKAGE | BODY SIZE (NOM) |
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CDCM9102 | VQFN (32) | 5.00 mm × 5.00 mm |
Changes from * Revision (February 2012) to A Revision
PACKAGED DEVICES | FEATURES | TA |
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CDCM9102RHBT | 32-pin VQFN (RHB) package, small tape and reel | –40°C to 85°C |
CDCM9102RHBR | 32-pin VQFN (RHB) package, tape and reel |