JAJS189U January   2006  – September 2024 TPS737

PRODUCTION DATA  

  1.   1
  2. 特長
  3. アプリケーション
  4. 概要
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Thermal Information
    6. 5.6 Electrical Characteristics
    7. 5.7 Typical Characteristics
  7. Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagrams
    3. 6.3 Feature Description
      1. 6.3.1 Output Noise
      2. 6.3.2 Internal Current Limit
      3. 6.3.3 Enable Pin and Shutdown
      4. 6.3.4 Reverse Current
    4. 6.4 Device Functional Modes
  8. Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 Input and Output Capacitor Requirements
        2. 7.2.2.2 Dropout Voltage
        3. 7.2.2.3 Transient Response
      3. 7.2.3 Application Curves
    3. 7.3 Best Design Practices
    4. 7.4 Power Supply Recommendations
    5. 7.5 Layout
      1. 7.5.1 Layout Guidelines
        1. 7.5.1.1 Power Dissipation
        2. 7.5.1.2 Thermal Protection
        3. 7.5.1.3 Estimating Junction Temperature
      2. 7.5.2 Layout Example
  9. Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Development Support
        1. 8.1.1.1 Evaluation Modules
        2. 8.1.1.2 Spice Models
      2. 8.1.2 Device Nomenclature
    2. 8.2 Documentation Support
      1. 8.2.1 Related Documentation
    3. 8.3 ドキュメントの更新通知を受け取る方法
    4. 8.4 サポート・リソース
    5. 8.5 Trademarks
    6. 8.6 静電気放電に関する注意事項
    7. 8.7 用語集
  10. Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Typical Characteristics

for all voltage versions at TJ = 25°C, VIN = VOUT(nom) + 1 V, IOUT = 10 mA, VEN = 2.2 V, and COUT = 2.2 μF (unless otherwise noted)

TPS737 Load
                        Regulation
Legacy silicon
Figure 5-1 Load Regulation
TPS737 Line
                        Regulation
Legacy silicon 
Figure 5-3 Line Regulation
TPS737 Dropout Voltage vs Output Current
Legacy silicon
Figure 5-5 Dropout Voltage vs Output Current
TPS737 Dropout Voltage vs Temperature
Legacy silicon
Figure 5-7 Dropout Voltage vs Temperature
TPS737 Output Voltage Histogram
Legacy silicon 
Figure 5-9 Output Voltage Histogram
TPS737 Ground Pin Current vs Output Current
Legacy silicon 
Figure 5-11 Ground Pin Current vs Output Current
TPS737 Ground Pin Current vs Temperature
Legacy silicon 
Figure 5-13 Ground Pin Current vs Temperature
TPS737 Ground Pin Current in Shutdown vs Temperature
Legacy silicon 
Figure 5-15 Ground Pin Current in Shutdown vs Temperature
TPS737 Current Limit vs VOUT (Foldback)
Legacy silicon 
Figure 5-17 Current Limit vs VOUT (Foldback)
TPS737 Current Limit vs VIN
Legacy silicon 
Figure 5-19 Current Limit vs VIN
TPS737 Current Limit vs Temperature
Legacy silicon
Figure 5-21 Current Limit vs Temperature
TPS737 PSRR
                        (Ripple Rejection) vs Frequency
Legacy silicon 
Figure 5-23 PSRR (Ripple Rejection) vs Frequency
TPS737 PSRR
                        (Ripple Rejection) vs (VIN – VOUT)
Legacy silicon 
Figure 5-25 PSRR (Ripple Rejection) vs (VIN – VOUT)
TPS737 Noise
                        Spectral Density
Legacy silicon
Figure 5-27 Noise Spectral Density
TPS737 TPS73701 RMS Noise Voltage vs CFB
Legacy silicon 
Figure 5-29 TPS73701 RMS Noise Voltage vs CFB
TPS737 RMS
                        Noise Voltage vs COUT
Legacy silicon 
Figure 5-31 RMS Noise Voltage vs COUT
TPS737 RMS
                        Noise Voltage vs CNR
Legacy silicon 
Figure 5-33 RMS Noise Voltage vs CNR
TPS737 TPS73733 Load Transient Response
Legacy silicon 
Figure 5-35 TPS73733 Load Transient Response
TPS737 TPS73733 Line Transient Response
Legacy silicon 
Figure 5-37 TPS73733 Line Transient Response
TPS737 TPS73701 Turn-On Response
Legacy silicon 
Figure 5-39 TPS73701 Turn-On Response
TPS737 TPS73701 Turn-Off Response
Legacy silicon 
Figure 5-41 TPS73701 Turn-Off Response
TPS737 TPS73701, VOUT = 3.3-V Power-Up and Power-Down
Legacy silicon 
Figure 5-43 TPS73701, VOUT = 3.3-V Power-Up and Power-Down
TPS737 IEN vs Temperature
Legacy silicon
Figure 5-45 IEN vs Temperature
TPS737 TPS73701 IFB vs Temperature
Legacy silicon 
Figure 5-47 TPS73701 IFB vs Temperature
TPS737 TPS73701 Load Transient, Adjustable Version
Legacy silicon
Figure 5-49 TPS73701 Load Transient, Adjustable Version
TPS737 TPS73701 Line Transient, Adjustable Version
Legacy silicon
Figure 5-51 TPS73701 Line Transient, Adjustable Version
TPS737 Load Regulation
New silicon
Figure 5-2 Load Regulation
TPS737 Line Regulation
New silicon
Figure 5-4 Line Regulation
TPS737 Dropout Voltage vs Output
                        Current
New silicon
Figure 5-6 Dropout Voltage vs Output Current
TPS737 Dropout Voltage vs
                        Temperature
New silicon
Figure 5-8 Dropout Voltage vs Temperature
TPS737 Output Voltage Drift
                        Histogram
Legacy silicon 
Figure 5-10 Output Voltage Drift Histogram
TPS737 Ground Pin Current vs
                        Output Current
New silicon
Figure 5-12 Ground Pin Current vs Output Current
TPS737 Ground Pin Current vs
                        Temperature
New silicon
Figure 5-14 Ground Pin Current vs Temperature
TPS737 Ground Pin Current in
                        Shutdown vs Temperature
New silicon
Figure 5-16 Ground Pin Current in Shutdown vs Temperature
TPS737 Current Limit vs VOUT (Foldback)
New silicon
Figure 5-18 Current Limit vs VOUT (Foldback)
TPS737 Current Limit vs
                            VIN
New silicon
Figure 5-20 Current Limit vs VIN
TPS737 Current Limit vs
                        Temperature
New silicon
Figure 5-22 Current Limit vs Temperature
TPS737 PSRR (Ripple Rejection) vs
                        Frequency
New silicon
Figure 5-24 PSRR (Ripple Rejection) vs Frequency
TPS737 PSRR
                        (Ripple Rejection) vs (VIN – VOUT)
New silicon 
Figure 5-26 PSRR (Ripple Rejection) vs (VIN – VOUT)
TPS737 Noise
                        Spectral Density
New silicon
Figure 5-28 Noise Spectral Density
TPS737 TPS73701 RMS Noise Voltage
                        vs CFB
New silicon
Figure 5-30 TPS73701 RMS Noise Voltage vs CFB
TPS737 RMS
                        Noise Voltage vs COUT
New silicon 
Figure 5-32 RMS Noise Voltage vs COUT
TPS737 RMS
                        Noise Voltage vs CNR
New silicon 
Figure 5-34 RMS Noise Voltage vs CNR
TPS737 TPS73733 Load Transient Response
New silicon 
Figure 5-36 TPS73733 Load Transient Response
TPS737 TPS73733 Line Transient Response
New silicon 
Figure 5-38 TPS73733 Line Transient Response
TPS737 TPS73701 Turn-On
                        Response
New silicon
Figure 5-40 TPS73701 Turn-On Response
TPS737 TPS73701 Turn-Off
                        Response
New silicon
Figure 5-42 TPS73701 Turn-Off Response
TPS737 TPS73701, VOUT
                        = 3.3-V Power-Up and Power-Down
New silicon
Figure 5-44 TPS73701, VOUT = 3.3-V Power-Up and Power-Down
TPS737 IEN vs Temperature
New silicon
Figure 5-46 IEN vs Temperature
TPS737 TPS73701 IFB vs Temperature
New silicon 
Figure 5-48 TPS73701 IFB vs Temperature
TPS737 TPS73701 Load Transient, Adjustable Version
New silicon, COUT = 10μF tantalum
Figure 5-50 TPS73701 Load Transient, Adjustable Version
TPS737 TPS73701 Line Transient,
                        Adjustable Version
 New silicon, COUT = 10μF tantalum
Figure 5-52 TPS73701 Line Transient, Adjustable Version