JAJS194E January   2007  – June 2019 TPS40077

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
    1.     Device Images
      1.      アプリケーション概略図
  4. 4 改訂履歴
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Electrical Characteristics
    5. 6.5 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Minimum Pulse Duration
      2. 7.3.2  Slew Rate Limit On VDD
      3. 7.3.3  Setting The Switching Frequency (Programming The Clock Oscillator)
      4. 7.3.4  Loop Compensation
      5. 7.3.5  Shutdown and Sequencing
      6. 7.3.6  Boost and LVBP Bypass Capacitance
      7. 7.3.7  Internal Regulators
      8. 7.3.8  Power Dissipation
      9. 7.3.9  Boost Diode
      10. 7.3.10 Synchronous Rectifier Control
    4. 7.4 Programming
      1. 7.4.1 Programming The Ramp Generator Circuit and UVLO
      2. 7.4.2 Programming Soft Start
      3. 7.4.3 Programming Short-Circuit Protection
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Buck Regulator 8-V to 16-V Input, 1.8-V Output at 10 A
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1 Power Train Components
            1. 8.2.1.2.1.1  Output Inductor, LOUT
            2. 8.2.1.2.1.2  Output Capacitor, COUT, ELCO and MLCC
            3. 8.2.1.2.1.3  Input Capacitor, CIN ELCO and MLCC
            4. 8.2.1.2.1.4  Switching MOSFET, QSW
            5. 8.2.1.2.1.5  Rectifier MOSFET, QSR
            6. 8.2.1.2.1.6  Timing Resistor, RT
            7. 8.2.1.2.1.7  Feed-Forward and UVLO Resistor, RKFF
            8. 8.2.1.2.1.8  Soft-Start Capacitor, CSS
            9. 8.2.1.2.1.9  Short-Circuit Protection, RILIM and CILIM
            10. 8.2.1.2.1.10 Boost Voltage, CBOOST and DBOOST (Optional)
            11. 8.2.1.2.1.11 Closing the Feedback Loop, RZ1, RP1, RPZ2, RSET1, RSET2, CZ2, CP2, and CPZ1
        3. 8.2.1.3 Application Curves
    3. 8.3 Additional System Examples
  9. 9 Layout
    1. 9.1 Layout Guidelines
  10. 10デバイスおよびドキュメントのサポート
    1. 10.1 デバイス・サポート
      1. 10.1.1 デベロッパー・ネットワークの製品に関する免責事項
    2. 10.2 ドキュメントのサポート
      1. 10.2.1 関連資料
    3. 10.3 ドキュメントの更新通知を受け取る方法
    4. 10.4 コミュニティ・リソース
    5. 10.5 商標
    6. 10.6 静電気放電に関する注意事項
    7. 10.7 Glossary
  11. 11メカニカル、パッケージ、および注文情報

7.3.8 Power Dissipation

The power dissipation in the TPS40077 is largely dependent on the MOSFET driver currents and the input voltage. The driver current is proportional to the total gate charge, Qg, of the external MOSFETs. Driver power (neglecting external gate resistance) can be calculated with Equation 5.

Equation 5. PD = Qg × VDR × fSW  (Watts/driver)

where

    The total power dissipation in the TPS40077, assuming the same MOSFET is selected for both the high-side and synchronous rectifier, is described in Equation 6 or Equation 7.

    Equation 6. TPS40077 Q12_pt_lus582.gif

    or

    Equation 7. TPS40077 Q13_pt2_lus582.gif

    where

      The maximum power capability of the TPS40077 PowerPAD package is dependent on the layout as well as air flow. The thermal impedance from junction to air, assuming 2-oz. copper trace and thermal pad with solder and no air flow, is 37°C/W. See the application report titled PowerPAD Thermally Enhanced Package (SLMA002) for detailed information on PowerPAD package mounting and usage.

      The maximum allowable package power dissipation is related to ambient temperature by Equation 8. For θJA, see Table 1.

      Equation 8. TPS40077 Q15_pt3_lus582.gif

      Table 1. Package Dissipation Ratings

      THERMAL IMPEDANCE,
      JUNCTION-TO-AMBIENT(1)       		TA = 25°C POWER RATING TA = 85°C POWER RATING
      Natural convection 37°C/W 2.7 W 1.08 W
      150 LFM airflow 30°C/W 3.33 W 1.33 W
      250 LFM airflow 28°C/W 3.57 W 1.42 W
      500 LFM airflow 26°C/W 3.84 W 1.52 W
      (1) For more information on the board and the methods used to determine ratings, see the PowerPAD Thermally Enhanced Package application report (SLMA002).

      Substituting Equation 8 into Equation 7 and solving for fSW yields the maximum operating frequency for the TPS40077. The result is described in Equation 9.

      Equation 9. TPS40077 Q16_fsw_lus582.gif