JAJS194E
January 2007 – June 2019
TPS40077
PRODUCTION DATA.
1
特長
2
アプリケーション
3
概要
Device Images
アプリケーション概略図
4
改訂履歴
5
Pin Configuration and Functions
Pin Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Electrical Characteristics
6.5
Typical Characteristics
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagram
7.3
Feature Description
7.3.1
Minimum Pulse Duration
7.3.2
Slew Rate Limit On VDD
7.3.3
Setting The Switching Frequency (Programming The Clock Oscillator)
7.3.4
Loop Compensation
7.3.5
Shutdown and Sequencing
7.3.6
Boost and LVBP Bypass Capacitance
7.3.7
Internal Regulators
7.3.8
Power Dissipation
7.3.9
Boost Diode
7.3.10
Synchronous Rectifier Control
7.4
Programming
7.4.1
Programming The Ramp Generator Circuit and UVLO
7.4.2
Programming Soft Start
7.4.3
Programming Short-Circuit Protection
8
Application and Implementation
8.1
Application Information
8.2
Typical Applications
8.2.1
Buck Regulator 8-V to 16-V Input, 1.8-V Output at 10 A
8.2.1.1
Design Requirements
8.2.1.2
Detailed Design Procedure
8.2.1.2.1
Power Train Components
8.2.1.2.1.1
Output Inductor, LOUT
8.2.1.2.1.2
Output Capacitor, COUT, ELCO and MLCC
8.2.1.2.1.3
Input Capacitor, CIN ELCO and MLCC
8.2.1.2.1.4
Switching MOSFET, QSW
8.2.1.2.1.5
Rectifier MOSFET, QSR
8.2.1.2.1.6
Timing Resistor, RT
8.2.1.2.1.7
Feed-Forward and UVLO Resistor, RKFF
8.2.1.2.1.8
Soft-Start Capacitor, CSS
8.2.1.2.1.9
Short-Circuit Protection, RILIM and CILIM
8.2.1.2.1.10
Boost Voltage, CBOOST and DBOOST (Optional)
8.2.1.2.1.11
Closing the Feedback Loop, RZ1, RP1, RPZ2, RSET1, RSET2, CZ2, CP2, and CPZ1
8.2.1.3
Application Curves
8.3
Additional System Examples
9
Layout
9.1
Layout Guidelines
10
デバイスおよびドキュメントのサポート
10.1
デバイス・サポート
10.1.1
デベロッパー・ネットワークの製品に関する免責事項
10.2
ドキュメントのサポート
10.2.1
関連資料
10.3
ドキュメントの更新通知を受け取る方法
10.4
コミュニティ・リソース
10.5
商標
10.6
静電気放電に関する注意事項
10.7
Glossary
11
メカニカル、パッケージ、および注文情報
Device Images
アプリケーション概略図