JAJS340F November   2008  – August 2016 TPS2552 , TPS2552-1 , TPS2553 , TPS2553-1

PRODUCTION DATA.  

  1. 特長
  2. アプリケーション
  3. 概要
  4. 改訂履歴
  5. Device Comparison Table
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. Parameter Measurement Information
  9. Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Overcurrent Conditions
      2. 9.3.2 Reverse-Voltage Protection
      3. 9.3.3 FAULT Response
      4. 9.3.4 Undervoltage Lockout (UVLO)
      5. 9.3.5 ENABLE (EN or EN)
      6. 9.3.6 Thermal Sense
    4. 9.4 Device Functional Modes
    5. 9.5 Programming
      1. 9.5.1 Programming the Current-Limit Threshold
  10. 10Application and Implementation
    1. 10.1 Application Information
      1. 10.1.1 Constant-Current vs Latch-Off Operation and Impact on Output Voltage
    2. 10.2 Typical Applications
      1. 10.2.1 Two-Level Current-Limit Circuit
        1. 10.2.1.1 Design Requirements
        2. 10.2.1.2 Detailed Design Procedures
          1. 10.2.1.2.1 Designing Above a Minimum Current Limit
          2. 10.2.1.2.2 Designing Below a Maximum Current Limit
          3. 10.2.1.2.3 Accounting for Resistor Tolerance
          4. 10.2.1.2.4 Input and Output Capacitance
        3. 10.2.1.3 Application Curves
      2. 10.2.2 Auto-Retry Functionality
        1. 10.2.2.1 Design Requirements
        2. 10.2.2.2 Detailed Design Procedure
      3. 10.2.3 Typical Application as USB Power Switch
        1. 10.2.3.1 Design Requirements
          1. 10.2.3.1.1 USB Power-Distribution Requirements
        2. 10.2.3.2 Detailed Design Procedure
          1. 10.2.3.2.1 Universal Serial Bus (USB) Power-Distribution Requirements
  11. 11Power Supply Recommendations
    1. 11.1 Self-Powered and Bus-Powered Hubs
    2. 11.2 Low-Power Bus-Powered and High-Power Bus-Powered Functions
    3. 11.3 Power Dissipation and Junction Temperature
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13デバイスおよびドキュメントのサポート
    1. 13.1 デバイス・サポート
    2. 13.2 関連リンク
    3. 13.3 ドキュメントの更新通知を受け取る方法
    4. 13.4 コミュニティ・リソース
    5. 13.5 商標
    6. 13.6 静電気放電に関する注意事項
    7. 13.7 Glossary
  14. 14メカニカル、パッケージ、および注文情報

6 Pin Configuration and Functions

TPS255x DBV Package
6-Pin SOT-23
Top View
TPS2552 TPS2553 TPS2552-1 TPS2553-1 po_DBV_slvs841.gif
EN = Active Low for the TPS2552
EN = Active High for the TPS2553
Add –1 to part number for latch-off version
TPS255x DRV Package
6-Pin WSON
Top View
TPS2552 TPS2553 TPS2552-1 TPS2553-1 po_DRV_slvs841.gif
EN = Active Low for the TPS2552
EN = Active High for the TPS2553
Add –1 to part number for latch-off version

Pin Functions

PIN I/O DESCRIPTION
NAME TPS2552 TPS2553
SOT-23 WSON SOT-23 WSON
EN 3 4 I Enable input, logic low turns on power switch
EN 3 4 I Enable input, logic high turns on power switch
FAULT 4 3 4 3 O Active-low open-drain output, asserted during overcurrent, overtemperature, or reverse-voltage conditions.
GND 2 5 2 5 Ground connection; connect externally to PowerPAD
ILIM 5 2 5 2 O External resistor used to set current-limit threshold; recommended 15 kΩ ≤ RILIM ≤ 232 kΩ.
IN 1 6 1 6 I Input voltage; connect a 0.1 µF or greater ceramic capacitor from IN to GND as close to the IC as possible.
OUT 6 1 6 1 O Power-switch output
PowerPAD™ PAD PAD Internally connected to GND; used to heat-sink the part to the circuit board traces. Connect PowerPAD to GND pin externally.

Add –1 for Latch-Off version