JAJS355G April   2009  – August 2016 TPS62230

PRODUCTION DATA.  

  1. 特長
  2. アプリケーション
  3. 概要
  4. 改訂履歴
  5. Device Comparison Table
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Undervoltage Lockout
      2. 8.3.2 Enable and Shutdown
      3. 8.3.3 Thermal Shutdown
    4. 8.4 Device Functional Modes
      1. 8.4.1 Soft-Start
      2. 8.4.2 Power-Save Mode
      3. 8.4.3 Forced PWM Mode
      4. 8.4.4 100% Duty Cycle Low Dropout Operation
      5. 8.4.5 Short Circuit Protection
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Output Filter Design (Inductor and Output Capacitor)
        2. 9.2.2.2 Inductor Selection
        3. 9.2.2.3 Output Capacitor Selection
        4. 9.2.2.4 Input Capacitor Selection
        5. 9.2.2.5 Checking Loop Stability
      3. 9.2.3 Application Curves
        1. 9.2.3.1  VOUT = 1.1 V - TPS622311
        2. 9.2.3.2  VOUT = 1.2 V - TPS62232/TPS62235
        3. 9.2.3.3  VOUT = 1.8 V - TPS62231
        4. 9.2.3.4  VOUT = 1.85 V - TPS62236
        5. 9.2.3.5  VOUT = 2.5 V - TPS62230
        6. 9.2.3.6  VOUT = 3.0 V - TPS62233
        7. 9.2.3.7  Start-Up
        8. 9.2.3.8  PFM / PWM Operation
        9. 9.2.3.9  Peak-to-Peak Output Ripple Voltage
        10. 9.2.3.10 Power-Supply Rejection
        11. 9.2.3.11 Spurious Output Noise
        12. 9.2.3.12 Line Transient Response
        13. 9.2.3.13 Mode Transition
        14. 9.2.3.14 AC-Load Regulation
        15. 9.2.3.15 Load Transient Response
    3. 9.3 System Examples
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12デバイスおよびドキュメントのサポート
    1. 12.1 デバイス・サポート
      1. 12.1.1 デベロッパー・ネットワークの製品に関する免責事項
    2. 12.2 関連リンク
    3. 12.3 ドキュメントの更新通知を受け取る方法
    4. 12.4 コミュニティ・リソース
    5. 12.5 商標
    6. 12.6 静電気放電に関する注意事項
    7. 12.7 Glossary
  13. 13メカニカル、パッケージ、および注文情報

8 Detailed Description

8.1 Overview

The TPS6223x synchronous step-down DC – DC converter family includes a unique hysteretic PWM controller scheme which enables switch frequencies over 3 MHz, excellent transient and AC load regulation as well as operation with cost-competitive external components.

The controller topology supports forced PWM mode as well as power-save mode operation. Power-save mode operation reduces the quiescent current consumption down to 22 μA and ensures high conversion efficiency at light loads by skipping switch pulses. In forced PWM mode, the device operates on a quasi-fixed frequency, avoids pulse skipping, and allows filtering of the switch noise by external filter components.

The TPS6223x devices offer fixed output voltage options featuring smallest solution size by using only three external components.

The internal switch current limit of typical 850 mA supports output currents of up to 500 mA, depending on the operating condition.

A significant advantage of TPS6223x compared to other hysteretic PWM controller topologies is its excellent DC and AC load regulation capability in combination with low-output voltage ripple over the entire load range which makes this part well suited for audio and RF applications.

Once the output voltage falls below the threshold of the error comparator, a switch pulse is initiated, and the high-side switch is turned on. It remains turned on until a minimum ON-time of tONmin expires and the output voltage trips the threshold of the error comparator or the inductor current reaches the high-side switch current limit. Once the high-side switch turns off, the low-side switch rectifier is turned on and the inductor current ramps down until the high-side switch turns on again or the inductor current reaches zero.

In forced PWM mode operation, negative inductor current is allowed to enable continuous conduction mode even at no load condition.

8.2 Functional Block Diagram

TPS62230 TPS62231 TPS62232 TPS62233 TPS62234 TPS62235 TPS62236 TPS62237 TPS62238 TPS62239 TPS622310 TPS622311 TPS622312 TPS622313 TPS622314 TPS622315 TPS622316 TPS622317 TPS622318 TPS622319 fbd_lvs941.gif

8.3 Feature Description

8.3.1 Undervoltage Lockout

The undervoltage lockout circuit prevents the device from misoperation at low input voltages. It prevents the converter from turning on the switch or rectifier MOSFET under undefined conditions. The TPS6223x devices have a UVLO threshold set to 1.8 V (typical). Fully functional operation is permitted for input voltage down to the falling UVLO threshold level. The converter starts operation again once the input voltage trips the rising UVLO threshold level.

8.3.2 Enable and Shutdown

The device starts operation when EN is set high and starts up with the soft-start as previously described. For proper operation, the EN pin must be terminated and must not be left floating, except for the TPS622319, which has an integrated 1MΩ always active pull-down resistor.

Pulling the EN pin low forces the device into shutdown, with a shutdown quiescent current of typically 0.1 μA. In this mode, the P- and N-channel MOSFETs are turned off, the internal resistor feedback divider is disconnected, and the entire internal-control circuitry is switched off.

The EN input can be used to control power sequencing in a system with various DC – DC converters. The EN pin can be connected to the output of another converter, to drive the EN pin high and getting a sequencing of supply rails.

8.3.3 Thermal Shutdown

As soon as the junction temperature, TJ, exceeds 150°C (typical) the device goes into thermal shutdown. In this mode, the high-side and low-side MOSFETs are turned off. The device continues its operation when the junction temperature falls below the thermal shutdown hysteresis.

8.4 Device Functional Modes

8.4.1 Soft-Start

The TPS6223x has an internal soft start circuit that controls the ramp up of the output voltage and limits the inrush current during start-up. This limits input voltage drops when a battery or a high-impedance power source is connected to the input of the converter.

The soft-start system generates a monotonic ramp up of the output voltage and reaches the nominal output voltage typically 100 μs after EN pin was pulled high.

If the output voltage does not reached its target value by this time, such as in the case of heavy load, the converter then operates in a current limit mode set by its switch current limits.

TPS6223x is able to start into a prebiased output capacitor. The converter starts with the applied bias voltage and ramps the output voltage to its nominal value.

8.4.2 Power-Save Mode

Connecting the MODE pin to GND enables the automatic PWM and power-save mode operation. The converter operates in quasi-fixed frequency PWM mode at moderate to heavy loads and in the pulse frequency modulation (PFM) mode during light loads, which maintains high efficiency over a wide load current range. In PFM mode, the device starts to skip switch pulses and generates only single pulses with an ON-time of tONmin. The PFM mode frequency depends on the load current and the external inductor and output capacitor values. The PFM mode of TPS6223x is optimized for low-output voltage ripple if small external components are used. Even at low output currents, the PFM frequency is above the audible noise spectrum and makes this operation mode suitable for audio applications.

The ON-time tONmin can be estimated to:

Equation 1. TPS62230 TPS62231 TPS62232 TPS62233 TPS62234 TPS62235 TPS62236 TPS62237 TPS62238 TPS62239 TPS622310 TPS622311 TPS622312 TPS622313 TPS622314 TPS622315 TPS622316 TPS622317 TPS622318 TPS622319 eq1_ton_lvs941.gif

Therefore, the peak inductor current in PFM mode is approximately:

Equation 2. TPS62230 TPS62231 TPS62232 TPS62233 TPS62234 TPS62235 TPS62236 TPS62237 TPS62238 TPS62239 TPS622310 TPS622311 TPS622312 TPS622313 TPS622314 TPS622315 TPS622316 TPS622317 TPS622318 TPS622319 eq2_ilpf_lvs941.gif

The transition from PFM into PWM mode and vice versa can be estimated to:

Equation 3. TPS62230 TPS62231 TPS62232 TPS62233 TPS62234 TPS62235 TPS62236 TPS62237 TPS62238 TPS62239 TPS622310 TPS622311 TPS622312 TPS622313 TPS622314 TPS622315 TPS622316 TPS622317 TPS622318 TPS622319 eq6_ioutpfm_lvs941.gif

where

  • tON: High-side switch ON-time [ns]
  • VIN: Input voltage [V]
  • VOUT: Output voltage [V]
  • L: Inductance [μH]
  • ILPFMpeak: PFM inductor peak current [mA]
  • IOUT_PFM/PWM: Output current for PFM to PWM mode transition and vice versa [mA]

8.4.3 Forced PWM Mode

Pulling the MODE pin high forces the converter to operate in a continuous conduction PWM mode even at light load currents. The advantage is that the converter operates with a quasi-fixed frequency that allows simple filtering of the switching frequency for noise-sensitive applications. In this mode, the efficiency is lower compared to the power save mode during light loads. This pin must be terminated except for the TPS622319 , which has an integrated 1MΩ always active pull-down resistor.

For additional flexibility, it is possible to switch from power-save mode to forced PWM mode during operation. This allows efficient power management by adjusting the operation of the converter to the specific system requirements.

8.4.4 100% Duty Cycle Low Dropout Operation

The device starts to enter 100% duty cycle mode once the input voltage comes close to the nominal output voltage. To maintain the output voltage, the high side switch is turned on 100% for one or more cycles.

With further decreasing VIN the high-side MOSFET switch is turned on completely. In this case the converter offers a low input-to-output voltage difference. This is particularly useful in battery-powered applications to achieve longest operation time by taking full advantage of the whole battery voltage range.

The minimum input voltage to maintain regulation depends on the load current and output voltage, and can be calculated as:

Equation 4. TPS62230 TPS62231 TPS62232 TPS62233 TPS62234 TPS62235 TPS62236 TPS62237 TPS62238 TPS62239 TPS622310 TPS622311 TPS622312 TPS622313 TPS622314 TPS622315 TPS622316 TPS622317 TPS622318 TPS622319 eq3_vin_lvs941.gif

where

  • IOUTmax: maximum output current plus inductor ripple current
  • RDS(on)max: maximum P-channel switch RDSon
  • RL: DC resistance of the inductor
  • VOUTmax: nominal output voltage plus maximum output voltage tolerance

8.4.5 Short Circuit Protection

The TPS6223x integrates a high-side and low-side MOSFET current limit to protect the device against heavy load or short circuit. The current in the switches is monitored by current limit comparators. When the current in the P-channel MOSFET reaches its current limit, the P-channel MOSFET is turned off and the N-channel MOSFET is turned on to ramp down the current in the inductor. The high-side MOSFET switch can only turn on again, once the current in the low side MOSFET switch has decreased below the threshold of its current limit comparator.