JAJS499J June   2010  – January 2018 TPS7A80

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
    1.     Device Images
      1.      標準アプリケーション回路
  4. 4 改訂履歴
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Internal Current Limit
      2. 7.3.2 Shutdown
      3. 7.3.3 Start-Up
      4. 7.3.4 Undervoltage Lockout (UVLO)
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
        1. 8.2.1.1 Dropout Voltage
        2. 8.2.1.2 Minimum Load
        3. 8.2.1.3 Input and Output Capacitor Requirements
        4. 8.2.1.4 Transient Response
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Output Noise
      3. 8.2.3 Application Curve
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 Board Layout Recommendations to Improve PSRR and Noise Performance
      2. 10.1.2 Thermal Considerations
      3. 10.1.3 Power Dissipation
      4. 10.1.4 Estimating Junction Temperature
    2. 10.2 Layout Example
  11. 11デバイスおよびドキュメントのサポート
    1. 11.1 ドキュメントのサポート
      1. 11.1.1 関連資料
    2. 11.2 ドキュメントの更新通知を受け取る方法
    3. 11.3 コミュニティ・リソース
    4. 11.4 商標
    5. 11.5 静電気放電に関する注意事項
    6. 11.6 Glossary
  12. 12メカニカル、パッケージ、および注文情報

8.1 Application Information

The TPS7A80 devices belong to a family of new generation LDO regulators that use innovative circuitry to achieve wide bandwidth and high loop gain, resulting in extremely high PSRR (over a 1-MHz range) at very low headroom (VIN – VOUT). A noise reduction capacitor (CNR) at the NR pin bypasses noise generated by the band-gap reference to improve PSRR, while a quick-start circuit fast-charges this capacitor. This family of regulators offers sub-band-gap output voltages, current limit, and thermal protection, and is fully specified from –40°C to 125°C.

Figure 31 gives the connections for the adjustable-output version (TPS7A8001). Figure 32 shows the connections for the fixed-voltage versions.