JAJSBF4L August   2011  – March 2017 TRF7970A

PRODUCTION DATA.  

  1. 1デバイスの概要
    1. 1.1 特長
    2. 1.2 アプリケーション
    3. 1.3 概要
    4. 1.4 機能ブロック図
  2. 2改訂履歴
  3. 3Device Characteristics
    1. 3.1 Related Products
  4. 4Terminal Configuration and Functions
    1. 4.1 Pin Diagram
    2. 4.2 Signal Descriptions
  5. 5Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Electrical Characteristics
    5. 5.5 Thermal Resistance Characteristics
    6. 5.6 Switching Characteristics
  6. 6Detailed Description
    1. 6.1  Overview
      1. 6.1.1 RFID and NFC Operation - Reader and Writer
      2. 6.1.2 NFC Device Operation - Initiator
      3. 6.1.3 NFC Device Operation - Target
        1. 6.1.3.1 Active Target
        2. 6.1.3.2 Passive Target
        3. 6.1.3.3 Card Emulation
    2. 6.2  System Block Diagram
    3. 6.3  Power Supplies
      1. 6.3.1 Supply Arrangements
      2. 6.3.2 Supply Regulator Settings
      3. 6.3.3 Power Modes
    4. 6.4  Receiver - Analog Section
      1. 6.4.1 Main and Auxiliary Receivers
      2. 6.4.2 Receiver Gain and Filter Stages
    5. 6.5  Receiver - Digital Section
      1. 6.5.1 Received Signal Strength Indicator (RSSI)
        1. 6.5.1.1 Internal RSSI - Main and Auxiliary Receivers
        2. 6.5.1.2 External RSSI
    6. 6.6  Oscillator Section
    7. 6.7  Transmitter - Analog Section
    8. 6.8  Transmitter - Digital Section
    9. 6.9  Transmitter - External Power Amplifier and Subcarrier Detector
    10. 6.10 TRF7970A IC Communication Interface
      1. 6.10.1 General Introduction
        1. 6.10.1.1 Continuous Address Mode
        2. 6.10.1.2 Noncontinuous Address Mode (Single Address Mode)
        3. 6.10.1.3 Direct Command Mode
        4. 6.10.1.4 FIFO Operation
      2. 6.10.2 Parallel Interface Mode
      3. 6.10.3 Reception of Air Interface Data
      4. 6.10.4 Data Transmission From MCU to TRF7970A
      5. 6.10.5 Serial Interface Communication (SPI)
        1. 6.10.5.1 Serial Interface Mode With Slave Select (SS)
      6. 6.10.6 Direct Mode
    11. 6.11 TRF7970A Initialization
    12. 6.12 Special Direct Mode for Improved MIFARE Compatibility
    13. 6.13 NFC Modes
      1. 6.13.1 Target
      2. 6.13.2 Initiator
    14. 6.14 Direct Commands from MCU to Reader
      1. 6.14.1 Command Codes
        1. 6.14.1.1  Idle (0x00)
        2. 6.14.1.2  Software Initialization (0x03)
        3. 6.14.1.3  Initial RF Collision Avoidance (0x04)
        4. 6.14.1.4  Response RF Collision Avoidance (0x05)
        5. 6.14.1.5  Response RF Collision Avoidance (0x06, n = 0)
        6. 6.14.1.6  Reset FIFO (0x0F)
        7. 6.14.1.7  Transmission With CRC (0x11)
        8. 6.14.1.8  Transmission Without CRC (0x10)
        9. 6.14.1.9  Delayed Transmission With CRC (0x13)
        10. 6.14.1.10 Delayed Transmission Without CRC (0x12)
        11. 6.14.1.11 Transmit Next Time Slot (0x14)
        12. 6.14.1.12 Block Receiver (0x16)
        13. 6.14.1.13 Enable Receiver (0x17)
        14. 6.14.1.14 Test Internal RF (RSSI at RX Input With TX ON) (0x18)
        15. 6.14.1.15 Test External RF (RSSI at RX Input with TX OFF) (0x19)
    15. 6.15 Register Description
      1. 6.15.1 Register Preset
      2. 6.15.2 Register Overview
      3. 6.15.3 Detailed Register Description
        1. 6.15.3.1 Main Configuration Registers
          1. 6.15.3.1.1 Chip Status Control Register (0x00)
          2. 6.15.3.1.2 ISO Control Register (0x01)
        2. 6.15.3.2 Control Registers - Sublevel Configuration Registers
          1. 6.15.3.2.1  ISO/IEC 14443 TX Options Register (0x02)
          2. 6.15.3.2.2  ISO/IEC 14443 High-Bit-Rate and Parity Options Register (0x03)
          3. 6.15.3.2.3  TX Timer High Byte Control Register (0x04)
          4. 6.15.3.2.4  TX Timer Low Byte Control Register (0x05)
          5. 6.15.3.2.5  TX Pulse Length Control Register (0x06)
          6. 6.15.3.2.6  RX No Response Wait Time Register (0x07)
          7. 6.15.3.2.7  RX Wait Time Register (0x08)
          8. 6.15.3.2.8  Modulator and SYS_CLK Control Register (0x09)
          9. 6.15.3.2.9  RX Special Setting Register (0x0A)
          10. 6.15.3.2.10 Regulator and I/O Control Register (0x0B)
        3. 6.15.3.3 Status Registers
          1. 6.15.3.3.1  IRQ Status Register (0x0C)
          2. 6.15.3.3.2  Interrupt Mask Register (0x0D) and Collision Position Register (0x0E)
          3. 6.15.3.3.3  RSSI Levels and Oscillator Status Register (0x0F)
          4. 6.15.3.3.4  Special Functions Register (0x10)
          5. 6.15.3.3.5  Special Functions Register (0x11)
          6. 6.15.3.3.6  Adjustable FIFO IRQ Levels Register (0x14)
          7. 6.15.3.3.7  NFC Low Field Level Register (0x16)
          8. 6.15.3.3.8  NFCID1 Number Register (0x17)
          9. 6.15.3.3.9  NFC Target Detection Level Register (0x18)
          10. 6.15.3.3.10 NFC Target Protocol Register (0x19)
        4. 6.15.3.4 Test Registers
          1. 6.15.3.4.1 Test Register (0x1A)
          2. 6.15.3.4.2 Test Register (0x1B)
        5. 6.15.3.5 FIFO Control Registers
          1. 6.15.3.5.1 FIFO Status Register (0x1C)
          2. 6.15.3.5.2 TX Length Byte1 Register (0x1D), TX Length Byte2 Register (0x1E)
  7. 7Applications, Implementation, and Layout
    1. 7.1 TRF7970A Reader System Using SPI With SS Mode
      1. 7.1.1 General Application Considerations
      2. 7.1.2 Schematic
    2. 7.2 Layout Considerations
    3. 7.3 Impedance Matching TX_Out (Pin 5) to 50 Ω
    4. 7.4 Reader Antenna Design Guidelines
  8. 8デバイスおよびドキュメントのサポート
    1. 8.1 使い始めと次の手順
    2. 8.2 デバイスの項目表記
    3. 8.3 ツールとソフトウェア
    4. 8.4 ドキュメントのサポート
    5. 8.5 コミュニティ・リソース
    6. 8.6 商標
    7. 8.7 静電気放電に関する注意事項
    8. 8.8 Glossary
  9. 9メカニカル、パッケージ、および注文情報

7 Applications, Implementation, and Layout

NOTE

Information in the following Applications section is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI's customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.

7.1 TRF7970A Reader System Using SPI With SS Mode

7.1.1 General Application Considerations

Figure 7-1 shows and application schematic optimized for all TRF7970A modes using the Serial Port Interface (SPI). Short SPI lines, proper isolation of radio frequency lines, and a proper ground area are essential to avoid interference. The recommended clock frequency on the DATA_CLK line is 2 MHz. This figure also shows matching to a 50-Ω port, which allows connecting to a properly matched 50-Ω antenna circuit or RF measurement equipment (for example, a spectrum analyzer or power meter).

7.1.2 Schematic

Figure 7-1 shows a sample application schematic for SPI with an SS mode MCU interface.

TRF7970A app_schematic_spi_trf7970a_slos743.png Figure 7-1 Application Schematic – SPI With SS Mode MCU Interface

Minimum MCU requirements depend on application requirements and coding style. If only one ISO protocol or a limited command set of a protocol needs to be supported, MCU Flash and RAM requirements can be significantly reduced. Recursive inventory and anticollision commands require more RAM than single slotted operations. For example, an ISO/IEC 15693-only application that supports anticollision needs approximately 7KB of flash memory and 500 bytes of RAM. In contrast, a full NFC stack that supports peer-to-peer, card emulation, and reader/writer modes needs 65KB of flash memory and 4KB of RAM. An MCU that can run its GPIOs at 13.56 MHz is required for direct mode 0 operations.

7.2 Layout Considerations

Keep all decoupling capacitors as close to the IC as possible, with the high-frequency decoupling capacitors (10 nF) closer than the low-frequency decoupling capacitors (2.2 µF).

Place ground vias as close as possible to the ground side of the capacitors and reader IC pins to minimize possible ground loops.

TI recommends not using any inductor sizes smaller than 0603, as the output power can be compromised. If smaller inductors are necessary, output performance must be confirmed in the final application.

Pay close attention to the required load capacitance of the crystal, and adjust the two external shunt capacitors accordingly. Follow the recommendations of the crystal manufacturer for those values.

There should be a common ground plane for the digital and analog sections. The multiple ground sections or islands should have vias that tie the different sections of the planes together.

Ensure that the exposed thermal pad at the center of the reader IC is properly laid out. It should be tied to ground to help dissipate any heat from the package.

All trace line lengths should be made as short as possible, particularly the RF output path, crystal connections, and control lines from the reader to the microprocessor. Proper placement of the TRF7970A, microprocessor, crystal, and RF connection or connector help facilitate this.

Avoid crossing of digital lines under RF signal lines. Also, avoid crossing of digital lines with other digital lines when possible. If the crossings are unavoidable, 90° crossings should be used to minimize coupling of the lines.

Depending on the production test plan, consider possible implementations of test pads or test vias for use during testing. The necessary pads or vias should be placed in accordance with the proposed test plan to enable easy access to those test points.

If the system implementation is complex (for example, if the RFID reader module is a subsystem of a greater system with other modules (Bluetooth, Wi-Fi, microprocessors, and clocks), special considerations should be taken to ensure that there is no noise coupling into the supply lines. If needed, special filtering or regulator considerations should be used to minimize or eliminate noise in these systems.

For more information/details on layout considerations, see the TRF796x HF-RFID Reader Layout Design Guide.

7.3 Impedance Matching TX_Out (Pin 5) to 50 Ω

The output impedance of the TRF7970A when operated at full power out setting is nominally 4 + j0 (4 Ω real). This impedance must be matched to a resonant circuit and TI recommends matching circuit from 4 Ω to 50 Ω, as commercially available test equipment (for example, spectrum analyzers, power meters, and network analyzers) are 50-Ω systems. Figure 7-2 shows an impedance-matching reference circuit. Figure 7-3 shows a Smith chart simulation based on this circuit. This section explains how the values were calculated.

Starting with the 4-Ω source, the process of going from 4 Ω to 50 Ω can be represented on a Smith Chart simulator (available from http://www.fritz.dellsperger.net/). The elements are combined where appropriate (see Figure 7-2).

TRF7970A impedence_matching_circuit_slos743.gif Figure 7-2 Impedance Matching Circuit
TRF7970A impedence_matching_smith_chart_slos743.png Figure 7-3 Smith Chart Simulation

Resulting power out can be measured with a power meter or spectrum analyzer with power meter function or other equipment capable of making a "hot" measurement. Observe maximum power input levels on test equipment and use attenuators whenever available to avoid damage to equipment. Expected output power levels under various operating conditions are shown in Table 6-25.

7.4 Reader Antenna Design Guidelines

For HF antenna design considerations using the TRF7970A, see these documents: