TPS62125 3V～17V、300mA降圧型コンバータ、可変イネーブル・スレッショルドおよびヒステリシス付き

7.3.1 Undervoltage Lockout

In addition to the EN comparator, the device includes an under-voltage lockout circuit which prevents the device from misoperation at low input voltages. Both circuits are fed to an AND gate and prevents the converter from turning on the high-side MOSFET switch or low-side MOSFET under undefined conditions. The UVLO threshold is set to 2.9 V typical for rising V_IN and 2.8 V typical for falling V_IN. The hysteresis between rising and falling UVLO threshold ensures proper start-up. Fully functional operation is permitted for an input voltage down to the falling UVLO threshold level. The converter starts operation again once the input voltage trips the rising UVLO threshold level and the voltage at the EN pin trips V_{TH_EN_ON}.

7.3.2 Enable Comparator (EN / EN_hys)

The EN pin is connected to an on/shutdown detector (ON/SD) and an input of the enable comparator. With a voltage level of 0.4 V or less at the EN pin, the ON/SD detector turns the device into Shutdown mode and the quiescent current is reduced to typically 350 nA. In this mode the EN comparator as well the entire internal-control circuitry are switched off. A voltage level of typical 900 mV (rising) at the EN pin triggers the on/shutdown detector and activates the internal reference V_REF (typical 1.2 V), the EN comparator and the UVLO comparator. In applications with slow rising voltage levels at the EN pin, the quiescent current profile before this trip point needs to be considered, see Figure 3. Once the ON/SD detector has tripped, the quiescent current consumption of the device is typical 6 µA. The TPS62125 starts regulation once the voltage at the EN pin trips the threshold V_{EN_TH ON} (typical 1.2 V) and the input voltage is above the UVLO threshold. It enters softstart and ramps up the output voltage. For proper operation, the EN pin must be terminated and must not be left floating. The quiescent current consumption of the TPS62125 is typical 13 µA under no load condition (not switching). See Figure 1. The DC/DC regulator stops operation once the voltage on the EN pin falls below the threshold V_{EN_TH OFF} (typical 1.15 V) or the input voltage falls below UVLO threshold. The enable comparator features a built in hysteresis of typical 50 mV. This hysteresis can be increased with an external resistor connected to pin EN_hys.

7.3.3 Power Good Output and Output Discharge (PG)

The power good output (PG pin) is an open drain output. The circuit is active once the device is enabled. It is driven by an internal comparator connected to the FB pin voltage and an internal reference. The PG output provides a high level (open drain high impedance) once the feedback voltage exceeds typical 95% of its nominal value. The PG output is driven to low level once the FB pin voltage falls below typical 90% of its nominal value V_{REF_FB}. The PG output goes high (high impedance) with a delay of typically 2 µs. A pull up resistor is needed to generate a high level. The PG pin can be connected via a pull up resistors to a voltage up to 10 V. This pin can also be used to discharge the output capacitor. See section Application Information for more details.

The PG output is pulled low if the voltage on the EN pin falls below the threshold V_{EN_TH OFF} or the input voltage is below the undervoltage lockout threshold UVLO.

7.3.4 Thermal Shutdown

As soon as the junction temperature, T_J, exceeds 150°C (typical) the device goes into thermal shutdown. In this mode, the high-side and low-side MOSFETs are turned-off. The device continues its operation when the junction temperature falls below the thermal shutdown hysteresis.

7.4.1 Pulse Width Modulation (PWM) Operation

The TPS62125 operates with pulse width modulation in continuous conduction mode (CCM) with a nominal switching frequency of about 1 MHz. The frequency variation in PWM mode is controlled and depends on V_IN, V_OUT and the inductance. The device operates in PWM mode as long the output current is higher than half the inductor's ripple current. To maintain high efficiency at light loads, the device enters power-save mode at the boundary to discontinuous conduction mode (DCM). This happens if the output current becomes smaller than half the inductor's ripple current.

7.4.2 Power-Save Mode

With decreasing load current, the TPS62125 transitions seamlessly from PWM mode to power-save mode once the inductor current becomes discontinuous. This ensures a high efficiency at light loads. In power-save mode the converter operates in pulse frequency modulation (PFM) mode and the switching frequency decreases linearly with the load current. DCS-Control features a small and predictable output voltage ripple in power-save mode. The transition between PWM mode and power-save mode occurs seamlessly in both directions.

The minimum ON-time T_ONmin for a single pulse can be estimated by:

Equation 1.

Therefore the peak inductor current in PFM mode is approximately:

Equation 2.

where

• T_ON: High-side MOSFET switch on time [µs]
• V_IN: Input voltage [V]
• V_OUT: Output voltage [V]
• L : Inductance [µH]
• I_LPFMpeak : PFM inductor peak current [mA]

The transition from PFM mode to PWM mode operation and back occurs at a load current of approximately 0.5 x I_LPFMpeak.

The maximum switching frequency can be estimated by:

Equation 3.

7.4.3 100% Duty Cycle Low Dropout Operation

The device increases the ON-time of the high-side MOSFET switch as the input voltage comes close to the output voltage in order to keep the output voltage in regulation. This reduces the switching frequency.

With further decreasing input voltage V_IN, the high-side MOSFET switch is turned on completely. In this case, the converter provides a low input-to-output voltage difference. This is particularly useful in applications with a widely variable supply voltage to achieve longest operation time by taking full advantage of the whole supply voltage span.

The minimum input voltage to maintain output voltage regulation depends on the load current and output voltage, and can be calculated as:

Equation 4.

where

• I_OUT: Output current
• R_DS(ON)max: Maximum high-side switch R_DS(ON)
• R_L: DC resistance of the inductor
• V_OUTmin: Minimum output voltage the load can accept

7.4.4 Soft-Start

The TPS62125 has an internal soft-start circuit which controls the ramp up of the output voltage and limits the inrush current during start-up. This limits input voltage drop.

The soft-start system generates a monotonic ramp up of the output voltage and reaches an output voltage of 1.8 V typical within 240 µs after the EN pin was pulled high. For higher output voltages, the ramp up time of the output voltage can be estimated with a ramp up slew rate of about 12 mV/us. TPS62125 is able to start into a prebiased output capacitor. The converter starts with the applied bias voltage and ramps the output voltage to its nominal value. In case the output voltage is higher than the nominal value, the device starts switching once the output has been discharged by an external load or leakage current to its nominal output voltage value.

During start-up the device can provide an output current of half of the high-side MOSFET switch current limit I_LIMF. Large output capacitors and high load currents may exceed the current capability of the device during start-up. In this case the start-up ramp of the output voltage will be slower.

7.4.5 Short-Circuit Protection

The TPS62125 integrates a high-side MOSFET switch current limit, I_LIMF, to protect the device against a short circuit. The current in the high-side MOSFET switch is monitored by a current limit comparator and once the current reaches the limit of I_LIMF , the high-side MOSFET switch is turned off and the low-side MOSFET switch is turned on to ramp down the inductor current. The high-side MOSFET switch is turned on again once the zero current comparator trips and the inductor current has become zero. In this case, the output current is limited to half of the high-side MOSFET switch current limit, 0.5 x I_LIMF, typ. 300mA.

8.2.1 Design Requirements

The device operates over an input voltage range from 3 V to 17 V. The output voltage is adjustable using an external feedback divider.

8.2.2 Detailed Design Procedure

8.2.2.1 Output Voltage Setting

The output voltage can be calculated by:

Equation 5.

The internal reference voltage for the error amplifier, V_{REF_FB}, is nominal 0.808 V. However for the feedback resistor divider selection, it is recommended to use the value 0.800 V as the reference. Using this value, the output voltage sets 1% higher and provides more headroom for load transients as well for line and load regulation. The current through the feedback resistors R₁ and R₂ should be higher than 1 µA. In applications operating over full temperature range or in noisy environments, this current may be increased for robust operation. However, higher currents through the feedback resistors impact the light load efficiency of the converter.

Table 1 shows a selection of suggested values for the feedback divider network for most common output voltages.

Table 1. Suggested Values for Feedback Divider Network

OUTPUT VOLTAGE	1.2 V	1.8 V	3.3 V	5 V	6.7 V	8 V
R1 [kΩ]	180	300	1800	1100	1475	1800
R2 [kΩ]	360	240	576	210	200	200

8.2.2.2 Enable Threshold and Hysteresis Setting

Figure 9. Using the Enable Comparator Threshold and Hysteresis for an Input SVS (Supply Voltage Supervisor)

The enable comparator can be used as an adjustable input supply voltage supervisor (SVS) to start and stop the DC/DC converter depending on the input voltage level. The input voltage level, V_{IN_startup}, at which the device starts up is set by the resistors R_EN1 and R_EN2 and can be calculated by :

Equation 6.

The resistor values R_EN1 and R_EN2 can be calculated by:

Equation 7.

Equation 8.

The input voltage level V_{IN_stop} at which the device will stop operation is set by R_EN1, R_EN2 and R_{EN HYS} and can be calculated by:

Equation 9.

The resistor value R_{EN_hys} can be calculated according to:

Equation 10.

The current through the resistors R_EN1, R_EN2, and R_{EN HYS} should be higher than 1 µA. In applications operating over the full temperature range and in noisy environments, the resistor values can be reduced to smaller values.

Figure 10. Using the EN Comparator as Input SVS for Proper V_OUT Ramp Up

8.2.2.3 Power Good (PG) Pullup and Output Discharge Resistor

The power good open collector output needs an external pull up resistor to indicate a high level. The pull up resistor can be connected to a voltage level up to 10 V. The output can sink current up to 0.4 mA with specified output low level of less than 0.3 V. The lowest value for the pull up resistor can be calculated by:

Equation 11.

Figure 11. PG Open Collector Output

The PG pin can be used to discharge the output capacitor. The PG output has an internal resistance R_IPG of typical 600 Ω and minimum 400 Ω. The maximum sink current into the PG pin is 10 mA. In order to limit the discharge current to the maximum allowable sink current into the PG pin, the external pull up resistor R_{Pull up} can be calculated to:

Equation 12.

In case a negative value is calculated, the external pull up resistor can be removed and the PG pin can be directly connected to the output.

8.2.2.5 Inductor Selection

The inductor value affects its peak-to-peak ripple current, the PWM-to-PFM transition point, the output voltage ripple and the efficiency. The selected inductor has to be rated for its DC resistance and saturation current. The inductor ripple current (ΔI_L) decreases with higher inductance and increases with higher V_IN or V_OUT and can be estimated according to Equation 13.

Equation 14 calculates the maximum inductor current under static load conditions. The saturation current of the inductor should be rated higher than the maximum inductor current as calculated with Equation 14. This is recommended because during heavy load transient the inductor current will rise above the calculated value. A more conservative way is to select the inductor saturation current according to the high-side MOSFET switch current limit I_LIMF.

Equation 13.

Equation 14.

where

• T_ON: See Equation 1
• L: Inductance
• ΔI_L: Peak to Peak inductor ripple current
• I_Lmax: Maximum Inductor current

In DC/DC converter applications, the efficiency is essentially affected by the inductor AC resistance (i.e. quality factor) and by the inductor DCR value. To achieve high-efficiency operation, take care in selecting inductors featuring a quality factor above 25 at the switching frequency. Increasing the inductor value produces lower RMS currents, but degrades transient response. For a given physical inductor size, increased inductance usually results in an inductor with lower saturation current.

The total losses of the coil consist of both the losses in the DC resistance (R_DC) and the following frequency-dependent components:

• The losses in the core material (magnetic hysteresis loss, especially at high switching frequencies)
• Additional losses in the conductor from the skin effect (current displacement at high frequencies)
• Magnetic field losses of the neighboring windings (proximity effect)
• Radiation losses

The following inductor series from different suppliers have been used with the TPS62125.

Table 3. List of Inductors

INDUCTANCE [µH]	DCR [Ω]	DIMENSIONS [mm3]	INDUCTOR TYPE	SUPPLIER
10 / 15	0.33 max / 0.44 max.	3.3 x 3.3 x 1.4	LPS3314	Coilcraft
22	0.36 max.	3.9 x 3.9 x 1.8	LPS4018	Coilcraft
15	0.33 max.	3.0 x 2.5 x 1.5	VLF302515	TDK
10/15	0.44 max / 0.7 max.	3.0 x 3.0 x 1.5	LPS3015	Coilcraft
10	0.38 typ.	3.2 × 2.5 × 1.7	LQH32PN	Murata

8.2.3 Application Curves

Figure 12. Efficiency vs. Output Current V_OUT = 1.8 V

Figure 14. Efficiency vs. Output current, V_OUT = 3.3 V

Figure 16. Efficiency vs. Output Current, V_OUT = 5 V

Figure 18. Efficiency vs. Output current, V_OUT = 6.8 V

Figure 20. Efficiency vs. Output Current, V_OUT = 8 V

Figure 22. Efficiency vs. Output Current, V_OUT = 10 V

Figure 24. Output Voltage vs. Output Current, V_OUT = 3.3 V

Figure 26. Output Voltage vs. Output current, V_OUT = 5 V

Figure 28. Output Voltage vs. Output Current, V_OUT = 6.7 V

Figure 30. Output Voltage vs. Output Current, V_OUT = 8 V

Figure 32. Output Ripple Voltage vs. Output Current,
V_OUT = 3.3 V

Figure 34. Switch Frequency vs. Output Current, V_OUT 5 V

Figure 36. Power-Save Mode V_OUT= 3.3 V, I_OUT = 1 mA

Figure 38. Load Transient 5 mA to 200 mA, V_OUT = 3.3 V

Figure 40. Load Transient 1 mA to 50 mA, V_OUT = 5 V

Figure 42. AC Load Regulation V_OUT = 5 V

Figure 44. V_IN Hotplug Overshoot

Figure 46. Short Circuit and Overcurrent Protection

Figure 48. Operation With EN = V_IN, V_IN Tracks V_OUT

Figure 50. Start-Up 1.8 V V_OUT

Figure 52. Start-Up 5 V V_OUT

Figure 54. V_OUT Ramp Up/Down With EN On/Off

Figure 56. V_OUT Ramp Down With Falling V_IN, See Schematic Figure 59

Figure 13. Efficiency vs. Input Voltage, V_OUT = 1.8 V

Figure 15. Efficiency vs. Input voltage, V_OUT = 3.3 V

Figure 17. Efficiency vs. Input Voltage, V_OUT = 5 V

Figure 19. Efficiency vs. Input Voltage, V_OUT = 6.8 V

Figure 21. Efficiency vs. Input Voltage, V_OUT = 8 V

Figure 23. Efficiency vs. Input Voltage, V_OUT = 10 V

Figure 25. Output Voltage vs. Input Voltage, V_OUT = 3.3 V

Figure 27. Output Voltage vs. Input Voltage, V_OUT = 5 V

Figure 29. Output voltage vs. Input voltage, V_OUT = 6.7 V

Figure 31. Output Voltage vs. Input Voltage, V_OUT = 8 V

Figure 33. Switch Frequency vs. Output Current,
V_OUT = 3.3 V

Figure 35. Switch Frequency vs. Output Current, V_OUT = 8 V

Figure 37. PWM Mode V_OUT= 3.3 V, I_OUT = 100 mA

Figure 39. AC Load Regulation, V_OUT = 3.3 V

Figure 41. Load Transient 10 mA to 200 mA, V_OUT = 5 V

Figure 43. Line Transient Response V_IN = 9 V to 12 V

Figure 45. V_IN Hotplug Overshoot Reduction With Poscap

Figure 47. Input Supply Voltage Supervisor (SVS),
V_OUT = 5 V

Figure 49. 0.5 mA Current Source, 20 mA Pulse Load

Figure 51. Start-Up 3.3 V V_OUT

Figure 53. Start-Up 8 V V_OUT

Figure 55. Output Discharge Using PG Pin, Triggered by EN Comparator

8.3.1 TPS62125 5-V Output Voltage Configuration

Figure 57. TPS62125 5-V Output Voltage Configuration

8.3.2 TPS62125 5-V V_OUT

Figure 58. TPS62125 5-V V_OUT, Start-up Voltage V_{IN_Start} = 10 V, Stop Voltage V_{IN_Stop} = 6 V, See Figure 47

8.3.3 TPS62125 Operation From a Storage Capacitor Charged From a 0.5 mA Current Source

Figure 59. TPS62125 Operation From a Storage Capacitor Charged From a 0.5 mA Current Source,
V_OUT = 3.3 V, See Figure 49

8.3.4 5 V to –5 V Inverter Configuration

Figure 60. 5 V to –5 V Inverter Configuration, See SLVA514