JAJSBW2H November   2011  – June 2024 UCC27523 , UCC27525 , UCC27526

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 概要 (続き)
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagrams
    3. 7.3 Feature Description
      1. 7.3.1 VDD and Undervoltage Lockout
      2. 7.3.2 Operating Supply Current
      3. 7.3.3 Input Stage
      4. 7.3.4 Enable Function
      5. 7.3.5 Output Stage
      6. 7.3.6 Low Propagation Delays and Tightly Matched Outputs
    4. 7.4 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Input-to-Output Logic
        2. 8.2.2.2 Enable and Disable Function
        3. 8.2.2.3 VDD Bias Supply Voltage
        4. 8.2.2.4 Propagation Delay
        5. 8.2.2.5 Drive Current and Power Dissipation
      3. 8.2.3 Application Curves
  10. 9 Power Supply Recommendations
  11. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
    3. 10.3 Thermal Considerations
  12. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 サード・パーティ製品に関する免責事項
    2. 11.2 ドキュメントの更新通知を受け取る方法
    3. 11.3 サポート・リソース
    4. 11.4 Trademarks
    5. 11.5 静電気放電に関する注意事項
    6. 11.6 用語集
  13. 12Revision History
  14. 13Mechanical, Packaging, and Orderable Information

6.6 Switching Characteristics

over operating free-air temperature range (unless otherwise noted)
PARAMETERTEST CONDITIONSMINTYPMAXUNIT
tRRise time (1)CLOAD = 1.8 nF718ns
tFFall time(1)CLOAD = 1.8 nF610
tMDelay matching between 2 channelsINA = INB, OUTA and OUTB at 50% transition point14
tPWMinimum input pulse width that changes the output state1525
tD1, tD2Input to output propagation delay (1)CLOAD = 1.8 nF, 5-V input pulse61323
tD3, tD4EN to output propagation delay (1)CLOAD = 1.8 nF, 5-V enable pulse61323
(1) See timing diagrams in Figure 6-1, Figure 6-2, Figure 6-3, and Figure 6-4
UCC27523 UCC27525 UCC27526 Enable Function (For Non-Inverting Input Driver Operation)Figure 6-1 Enable Function (For Non-Inverting Input Driver Operation)
UCC27523 UCC27525 UCC27526 Non-Inverting Input Driver OperationFigure 6-3 Non-Inverting Input Driver Operation
UCC27523 UCC27525 UCC27526 Enable Function (For Inverting Input Driver Operation)Figure 6-2 Enable Function (For Inverting Input Driver Operation)
UCC27523 UCC27525 UCC27526 Inverting Input Driver OperationFigure 6-4 Inverting Input Driver Operation