JAJSC71E May   2016  – May 2019 TUSB1002

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
    1.     Device Images
      1.      概略回路図
  4. 4 改訂履歴
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics, Power Supply
    6. 6.6  Electrical Characteristics
    7. 6.7  Power-Up Requirements
    8. 6.8  Timing Requirements
    9. 6.9  Switching Characteristics
    10. 6.10 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 4-Level Control Inputs
      2. 7.3.2 Linear Equalization
      3. 7.3.3 Adjustable VOD Linear Range and DC Gain
      4. 7.3.4 Receiver Detect Control
      5. 7.3.5 USB3.1 Dual Channel Operation (MODE = “F”)
      6. 7.3.6 USB3.1 Single Channel Operation (MODE = “1”)
      7. 7.3.7 PCIe/SATA/SATA Express Redriver Operation (MODE = “R”; CFG1 = "0"; CFG2 = "0" )
    4. 7.4 Device Functional Modes
      1. 7.4.1 Shutdown Mode
      2. 7.4.2 Disconnect Mode
    5. 7.5 U0 Mode
    6. 7.6 U1 Mode
    7. 7.7 U2/U3 Mode
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical USB3.1 Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
    3. 8.3 Typical SATA, PCIe and SATA Express Application
      1. 8.3.1 Design Requirements
      2. 8.3.2 Detailed Design Procedure
      3. 8.3.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11デバイスおよびドキュメントのサポート
    1. 11.1 コミュニティ・リソース
    2. 11.2 商標
    3. 11.3 静電気放電に関する注意事項
    4. 11.4 Glossary
  12. 12メカニカル、パッケージ、および注文情報

6.10 Typical Characteristics

VCC = 3.3V , 25°C, 200 mVpp VID sine wave, ZO = 100 Ω, RGE package
TUSB1002 D001_SLLSEU4.gif
Figure 3. 1200 mV DC0 Gain Odd EQ Settings Curves
TUSB1002 D003_SLLSEU4.gif
Figure 5. 1200 mV DC Gain Adjustments Curves
TUSB1002 D005_SLLSEU4.gif
Figure 7. 1000 mV DC0 Gain Even EQ Settings Curves
TUSB1002 D007_SLLSEU4.gif
Figure 9. 900 mV DC0 Gain Odd EQ Settings Curves
TUSB1002 D009_SLLSEU4.gif
Figure 11. 900 mV DC Gain Adjustment Curves
TUSB1002 D013_SLLSEU4.gif
A.
Figure 13. SDD22 Return Loss
TUSB1002 D011_SLLSEU4.gif
A.
Figure 15. 100-MHz Sine Wave VID vs VOD Linearity Range Setting
TUSB1002 D002_SLLSEU4.gif
Figure 4. 1200 mV DC0 Even EQ Settings Curves
TUSB1002 D004_SLLSEU4.gif
Figure 6. 1000 mV DC0 Gain Odd EQ Settings Curves
TUSB1002 D006_SLLSEU4.gif
Figure 8. 1000 mV DC Gain Adjustments Curves
TUSB1002 D008_SLLSEU4.gif
Figure 10. 900 mV DC0 Gain Even EQ Settings Curves
TUSB1002 D012_SLLSEU4.gif
Figure 12. SDD11 Return Loss
TUSB1002 D010_SLLSEU4.gif
A.
Figure 14. 5-GHz Sine Wave VID vs VOD Linearity Range Setting