JAJSC71E May   2016  – May 2019 TUSB1002

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
    1.     Device Images
      1.      概略回路図
  4. 4 改訂履歴
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics, Power Supply
    6. 6.6  Electrical Characteristics
    7. 6.7  Power-Up Requirements
    8. 6.8  Timing Requirements
    9. 6.9  Switching Characteristics
    10. 6.10 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 4-Level Control Inputs
      2. 7.3.2 Linear Equalization
      3. 7.3.3 Adjustable VOD Linear Range and DC Gain
      4. 7.3.4 Receiver Detect Control
      5. 7.3.5 USB3.1 Dual Channel Operation (MODE = “F”)
      6. 7.3.6 USB3.1 Single Channel Operation (MODE = “1”)
      7. 7.3.7 PCIe/SATA/SATA Express Redriver Operation (MODE = “R”; CFG1 = "0"; CFG2 = "0" )
    4. 7.4 Device Functional Modes
      1. 7.4.1 Shutdown Mode
      2. 7.4.2 Disconnect Mode
    5. 7.5 U0 Mode
    6. 7.6 U1 Mode
    7. 7.7 U2/U3 Mode
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical USB3.1 Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
    3. 8.3 Typical SATA, PCIe and SATA Express Application
      1. 8.3.1 Design Requirements
      2. 8.3.2 Detailed Design Procedure
      3. 8.3.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11デバイスおよびドキュメントのサポート
    1. 11.1 コミュニティ・リソース
    2. 11.2 商標
    3. 11.3 静電気放電に関する注意事項
    4. 11.4 Glossary
  12. 12メカニカル、パッケージ、および注文情報

7.3.2 Linear Equalization

With a linear equalizer, the TUSB1002 can electrically shorten a particular channel allowing for longer run lengths.

TUSB1002 llinear_equaliz_sllseu4.pngFigure 16. Linear Equalizer

With a TUSB1002, the 28 in trace can be made to have similar insertion loss as the 12 inch trace.

The receiver equalization level for each channel is determined by the state of the CHx_EQ1 and CHx_EQ2 pins, where x = 1 or 2.

Table 2. EQ Configuration Options for 1200mV Linearity 0 dB DC Gain Setting

EQ SETTING # CHx_EQ2 PIN LEVEL CHx_EQ1 PIN LEVEL EQ GAIN at 2.5GHz / 5 GHz (dB)
1 0 0 1.9 / 5.5
2 0 R 2.8 / 7.1
3 0 F 3.5 / 8.2
4 0 1 4.4 / 9.3
5 R 0 5.0 / 10.2
6 R R 5.8 / 11.1
7 R F 6.4 / 11.8
8 R 1 7.1 / 12.6
9 F 0 7.6 / 13.1
10 F R 8.2 / 13.8
11 F F 8.7 / 14.3
12 F 1 9.2 / 14.8
13 1 0 9.6 / 15.2
14 1 R 10.1 / 15.6
15 1 F 10.4 / 16.0
16 1 1 10.6 / 16.3