JAJSC71E May   2016  – May 2019 TUSB1002

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
    1.     Device Images
      1.      概略回路図
  4. 4 改訂履歴
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics, Power Supply
    6. 6.6  Electrical Characteristics
    7. 6.7  Power-Up Requirements
    8. 6.8  Timing Requirements
    9. 6.9  Switching Characteristics
    10. 6.10 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 4-Level Control Inputs
      2. 7.3.2 Linear Equalization
      3. 7.3.3 Adjustable VOD Linear Range and DC Gain
      4. 7.3.4 Receiver Detect Control
      5. 7.3.5 USB3.1 Dual Channel Operation (MODE = “F”)
      6. 7.3.6 USB3.1 Single Channel Operation (MODE = “1”)
      7. 7.3.7 PCIe/SATA/SATA Express Redriver Operation (MODE = “R”; CFG1 = "0"; CFG2 = "0" )
    4. 7.4 Device Functional Modes
      1. 7.4.1 Shutdown Mode
      2. 7.4.2 Disconnect Mode
    5. 7.5 U0 Mode
    6. 7.6 U1 Mode
    7. 7.7 U2/U3 Mode
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical USB3.1 Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
    3. 8.3 Typical SATA, PCIe and SATA Express Application
      1. 8.3.1 Design Requirements
      2. 8.3.2 Detailed Design Procedure
      3. 8.3.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11デバイスおよびドキュメントのサポート
    1. 11.1 コミュニティ・リソース
    2. 11.2 商標
    3. 11.3 静電気放電に関する注意事項
    4. 11.4 Glossary
  12. 12メカニカル、パッケージ、および注文情報

4 改訂履歴

Changes from D Revision (October 2017) to E Revision

  • 「特長」、「概要」、「製品情報」の各セクションから TUSB1002I 産業用を削除Go
  • Deleted TUSB1002I Operating free-air temperature from the Recommended Operating ConditionsGo
  • Deleted TUSB1002I from the Thermal Information tableGo

Changes from C Revision (August 2017) to D Revision

  • Changed pin 8 From: RXIN To: RX1N in the RGE pin imageGo

Changes from B Revision (August 2017) to C Revision

  • 「特長」を「リニア・イコライゼーションにより、10Gbpsで最高15dBまで14段階の設定が可能」から「リニア・イコライゼーションにより、10Gbpsで最高16dBまで16段階の設定が可能」に変更Go
  • Deleted the RMQ package option from the Pin Configuration and Functions section Go
  • Deleted the RMQ package from the Pin Functions table Go
  • Changed the description of pin 7 From: R = Test Mode To: R = PCIe / Test Mode. in the Pin Functions table Go
  • Deleted the RMQ column from Thermal Information table Go
  • Added Differential crosstalk between TX and RX signal pairs. Go
  • From: EQ(GAIN-10Gbps) 15dB To: EQ(GAIN-10Gbps) 16dBGo
  • EQ setting 15 changed from Reserved to 10.4 / 16.0 Go
  • EQ setting 16 changed from Reserved to 10.6 / 16.3 Go
  • Added the PCIe/SATA/SATA Express Redriver Operation section. Go
  • Added the Typical SATA, PCIe, and SATA Expess Application section Go

Changes from A Revision (May 2016) to B Revision

  • 「応用回路例」のRXP2およびRXN2ピンにコンデンサを追加Go
  • Added a capacitor to the RXP2 and RXN2 pins of Figure 17Go
  • Updated the A/C coupling Capacitor section of Table 4Go
  • Changed text in the Detailed Design Procedure From: No A/C coupling capacitors are placed on the RX2P/N. To: 330nF A/C coupling capacitors along with 220k resistors are placed on the RX2P and RX2N. Inclusion of these 330nF capacitors and 220k resistors is optional but highly recommended. If not implemented, then RX2P/N should be DC-coupled to the USB receptacle.Go
  • Added 330nF AC capacitors (C12 and C13) on RX2P and RX2N in Figure 18Go

Changes from * Revision (May 2016) to A Revision

  • デバイスの状態を「プレビュー」から「量産」へ変更Go