JAJSC95F
December 2012 – December 2017
TPS7A66-Q1
,
TPS7A69-Q1
PRODUCTION DATA.
1
特長
2
アプリケーション
3
概要
Device Images
ハードウェア・イネーブル・オプション
入力電圧センス・オプション
4
改訂履歴
5
Pin Configuration and Functions
Pin Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
Switching Characteristics
6.7
Typical Characteristics
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagrams
7.3
Feature Description
7.3.1
Enable (EN)
7.3.2
Regulated Output (VOUT)
7.3.3
Power-On Reset (PG)
7.3.4
Reset Delay Timer (CT)
7.3.5
Sense Comparator (SI and SO for TPS7A69-Q1)
7.3.6
Adjustable Output Voltage (FB for TPS7A6601-Q1)
7.3.7
Undervoltage Shutdown
7.3.8
Low-Voltage Tracking
7.3.9
Thermal Shutdown
7.4
Device Functional Modes
7.4.1
Regulation
7.4.2
Disabled
7.4.3
Operation With V(VinUVLO)< VIN < VIN(min)
8
Application and Implementation
8.1
Application Information
8.2
Typical Applications
8.2.1
TPS7A66-Q1 Typical Application
8.2.1.1
Design Requirements
8.2.1.2
Detailed Design Procedure
8.2.1.2.1
Input Capacitor
8.2.1.2.2
Output Capacitor
8.2.1.3
Application Curve
8.2.2
TPS7A69-Q1 Typical Application
8.2.2.1
Design Requirements
8.2.2.2
Detailed Design Procedure
8.2.2.2.1
Low-Voltage Tracking Threshold
8.2.2.3
Application Curve
9
Power Supply Recommendations
10
Layout
10.1
Layout Guidelines
10.1.1
Package Mounting
10.1.2
Board Layout Recommendations to Improve PSRR and Noise Performance
10.2
Layout Examples
10.3
Power Dissipation and Thermal Considerations
11
デバイスおよびドキュメントのサポート
11.1
関連リンク
11.2
ドキュメントの更新通知を受け取る方法
11.3
コミュニティ・リソース
11.4
商標
11.5
静電気放電に関する注意事項
11.6
Glossary
12
メカニカル、パッケージ、および注文情報
8.2.1
TPS7A66-Q1 Typical Application
Figure 24.
Typical Application Schematic for TPS7A66-Q1