JAJSC95F December 2012 – December 2017 TPS7A66-Q1 , TPS7A69-Q1
PRODUCTION DATA.
For the layout of TPS7A66-Q1 and TPS7A69-Q1, place the input and output capacitors close to the devices as shown in Figure 28 and Figure 29, respectively. In order to enhance the thermal performance, TI recommends surrounding the device with some vias.
To improve ac performance such as PSRR, output noise, and transient response, TI recommends a board design with separate ground planes for VIN and VOUT, with each ground plane connected only at the GND pin of the device. In addition, the ground connection for the output capacitor should connect directly to the GND pin of the device.
Minimize equivalent series inductance (ESL) and ESR in order to maximize performance and ensure stability. Place every capacitor as close as possible to the device and on the same side of the PCB as the regulator itself.
Do not place any of the capacitors on the opposite side of the PCB from where the regulator is installed. TI strongly discourages the use of vias and long traces because they may impact system performance negatively and even cause instability.
If possible, and to ensure the maximum performance specified in this product data sheet, use the same layout pattern used for the TPS7A66-Q1 and TPS7A69-Q1 evaluation board, available at www.ti.com.