JAJSCI0B August   2016  – February 2017 LM27762

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 改訂履歴
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Undervoltage Lockout
      2. 7.3.2 Input Current Limit
      3. 7.3.3 PFM Operation
      4. 7.3.4 Output Discharge
      5. 7.3.5 Power Good Output (PGOOD)
      6. 7.3.6 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Shutdown Mode
      2. 7.4.2 Enable Mode
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Custom Design With WEBENCH® Tools
        2. 8.2.2.2 Positive Low-Dropout Linear Regulator and OUT+ Voltage Setting
        3. 8.2.2.3 Charge-Pump Voltage Inverter
        4. 8.2.2.4 Negative Low-Dropout Linear Regulator and OUT- Voltage Setting
        5. 8.2.2.5 External Capacitor Selection
          1. 8.2.2.5.1 Charge-Pump Output Capacitor
          2. 8.2.2.5.2 Input Capacitor
          3. 8.2.2.5.3 Flying Capacitor
          4. 8.2.2.5.4 LDO Output Capacitor
        6. 8.2.2.6 Power Dissipation
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11デバイスおよびドキュメントのサポート
    1. 11.1 デバイス・サポート
      1. 11.1.1 開発サポート
        1. 11.1.1.1 WEBENCH®ツールによるカスタム設計
    2. 11.2 ドキュメントの更新通知を受け取る方法
    3. 11.3 コミュニティ・リソース
    4. 11.4 商標
    5. 11.5 静電気放電に関する注意事項
    6. 11.6 Glossary
  12. 12メカニカル、パッケージ、および注文情報

7 Detailed Description

7.1 Overview

The LM27762 low-noise inverting charge pump with both positive and negative LDOs delivers very low-noise adjustable positive and negative outputs between ±1.5 V and ±5 V. The output voltage levels of the positive and negative LDO are independently controllable with external resistors. Input voltage range of LM27762 is from 2.7 V to 5.5 V. Five low-cost capacitors are used in this circuit to provide up to ±250 mA of output current. The LM27762 operates at 2-MHz (typical) switching frequency to reduce output resistance and voltage ripple. With an typical operating current of only 390 µA and 0.5-µA typical shutdown current, the LM27762 provides ideal performance for power amplifiers and DAC bias and other high-current, low-noise negative voltage needs.

The LM27762 device has an enable input (EN+) for the positive LDO and another enable input (EN–) for the negative charge pump and LDO. This supports independent timing for the positive and negative rails in system power sequence. Enable inputs can be also shorted together and connected to VIN. When LDO is disabled, output of the positive LDO has 50-kΩ pulldown to ground, and output of the negative LDO has 50-kΩ pullup to ground. The LM27762 has power good monitoring for OUT+ and OUT– outputs. The PGOOD pin is an open-drain output and requires an external pullup resistor. When Power Good feature is not used, PGOOD pin can be connected to ground.

7.2 Functional Block Diagram

LM27762 block_dgrm_SNVSAF7.gif

7.3 Feature Description

7.3.1 Undervoltage Lockout

The LM27762 has an internal comparator that monitors the voltage at VIN and forces the device into shutdown if the input voltage drops to 2.4 V. If the input voltage rises above 2.6 V, the LM27762 resumes normal operation.

7.3.2 Input Current Limit

The LM27762 contains current limit circuitry that protects the device in the event of excessive input current and/or output shorts to ground. The charge pump and positive LDO both have 500 mA (typical) input current limit when the output is shorted directly to ground. When the LM27762 is current limiting, power dissipation in the device is likely to be quite high. In this event, thermal cycling is expected.

7.3.3 PFM Operation

To minimize quiescent current during light load operation, the LM27762 allows PFM or pulse-skipping operation. By allowing the charge pump to switch less when the output current is low, the quiescent current drawn from the power source is minimized. The frequency of pulsed operation is not limited and can drop into the sub-2-kHz range when unloaded. As the load increases, the frequency of pulsing increases until it transitions to constant frequency. The fundamental switching frequency in the LM27762 is 2 MHz.

7.3.4 Output Discharge

In shutdown, the LM27762 actively pulls down on the outputs (OUT+, OUT–) of the device until the output voltage reaches GND.

7.3.5 Power Good Output (PGOOD)

The LM27762 has monitoring for the OUT+ and OUT– output voltage levels and open-drain PGOOD output.

Table 1. PGOOD (Active Low) Operation

EN+ EN– OUT+ OUT– PGOOD
Low Low Don't care Don't care High
High Low < 95% of target value Don't care High
High Low > 95% of target value Don't care Low
Low High Don't care < 95% of target value High
Low High Don't care > 95% of target value Low
High High < 95% of target value Don't care High
High High Don't care < 95% of target value High
High High > 95% of target value > 95% of target value Low

7.3.6 Thermal Shutdown

The LM27762 implements a thermal shutdown mechanism to protect the device from damage due to overheating. When the junction temperature rises to 150°C (typical), the device switches into shutdown mode. The LM27762 releases thermal shutdown when the junction temperature is reduced to 130°C (typical).

Thermal shutdown is most often triggered by self-heating, which occurs when there is excessive power dissipation in the device and/or insufficient thermal dissipation. The LM27762 device power dissipation increases with increased output current and input voltage. When self-heating brings on thermal shutdown, thermal cycling is the typical result. Thermal cycling is the repeating process where the part self-heats, enters thermal shutdown (where internal power dissipation is practically zero), cools, turns on, and then heats up again to the thermal shutdown threshold. Thermal cycling is recognized by a pulsing output voltage and can be stopped by reducing the internal power dissipation (reduce input voltage and/or output current) or the ambient temperature. If thermal cycling occurs under desired operating conditions, thermal dissipation performance must be improved to accommodate the power dissipation of the device.

7.4 Device Functional Modes

7.4.1 Shutdown Mode

When enable pins (EN+, EN–) are low, both positive and negative outputs of LM27762 are disabled, and the device is in shutdown mode reducing the quiescent current to minimum level. In shutdown, the outputs of the LM27762 are pulled to ground (internal 50 kΩ between each OUT pin and ground).

7.4.2 Enable Mode

Applying a voltage greater than 1.2 V to the EN+ pin enables the positive LDO. Applying a voltage greater than 1.2 V to the EN– pin enables the negative CP and LDO. When enabled, the positive and negative output voltages are equal to levels set by external resistors. Care must be taken to both the positive LDO and the inverting charge pump followed by negative LDO have enough headroom. Power Good ouput PGOOD indicates the status of OUT+ and OUT– voltage levels.