JAJSD08D October 2015 – November 2022 DP83867CS , DP83867E , DP83867IS
PRODUCTION DATA
This register is accessed via indirect register access. See Section 8.4.2.1 for details
BIT | BIT NAME | DEFAULT | DESCRIPTION |
---|---|---|---|
15 | PCS_RESET | 0, RW, SC | MMD3 PCS Reset: 1 = Resets the MMD3 register. Note: Setting this bit will subsequently cause a soft reset via the BMCR RESET bit (bit 15 of register address 0x0000). 0 = Normal operation. |
14:0 | RESERVED | 0, RO | RESERVED: Writes ignored, read as 0. |