JAJSDJ8A April 2017 – October 2021 ADC12D1620QML-SP
PRODUCTION DATA
MIN | MAX | UNIT | ||
---|---|---|---|---|
Case temperature | −55 | 125 | °C | |
Supply voltage (VA, VTC, VE) | 1.8 | 2 | V | |
Voltage on any input pin (except VinI+, VinI–, VinQ+, VinQ–) | −0.15 | 2.15 | V | |
Driver supply voltage (VDR) | 1.8 | VA | V | |
VinI+, VinI–, VinQ+, VinQ– voltage(2) | DC-coupled | –0.4 | 2.4 | V |
VinI+, VinI–, VinQ+, VinQ– differential voltage(3) | DC-coupled at 100% duty cycle | 1 | V | |
DC-coupled at 20% duty cycle | 2 | |||
DC-coupled at 10% duty cycle | 2.8 | |||
VinI+, VinI–, VinQ+, VinQ– current(2) | AC-coupled | –50 | 50 | mA |
VinI+, VinI–, VinQ+, VinQ– power | Maintaining common-mode voltage, AC-coupled | 15.3 | dBm | |
Not maintaining common-mode voltage, AC-coupled | 17.1 | |||
Ground difference – max(GNDTC/DR/E) – min(GNDTC/DR/E) | 0 | V | ||
Input current at any pin except VinI+, VinI–, VinQ+, or VinQ–(4) | ±50 | mA | ||
CLK+, CLK– voltage | 0 | VA | V | |
Differential CLK amplitude | 0.4 | 2 | VP-P | |
VCMI common-mode input voltage | VCMO – 150 | VCMO + 150 | mV |