JAJSEF5L July 2012 – May 2019 LP8556
PRODUCTION DATA.
Address 01h
Reset value 0000 0000b
DEVICE CONTROL REGISTER | |||||||
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7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
FAST | BRT_MODE[1:0] | BL_CTL | |||||
NAME | BIT | ACCESS | DESCRIPTION | ||||
FAST | 7 | Skip refresh of trim and configuration registers from EPROMs when exiting the low power STANDBY mode.
0 = read EPROMs before returning to the ACTIVE state 1 = only read EPROMs once on initial power-up. |
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BRT_MODE | 2:1 | R/W | Brightness source mode Figure 7 | ||||
00b = PWM input only | |||||||
01b = PWM input and Brightness register (combined before shaper block) | |||||||
10b = Brightness register only | |||||||
11b = PWM input and Brightness register (combined after shaper block) | |||||||
BL_CTL | 0 | R/W | Enable backlight when Brightness Register is used to control brightness
(BRT_MODE = 10). |
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0 = Backlight disabled and chip turned off
1 = Backlight enabled and chip turned on |
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This bit has no effect when PWM pin control is selected for brightness control
(BRT_MODE = 00). In this mode the state of PWM pin enable or disables the chip. |