JAJSEM0D February   2018  – April 2024 TUSB1044

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Switching Characteristics
    7. 5.7 Timing Requirements
    8. 5.8 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 USB 3.1
      2. 6.3.2 DisplayPort
      3. 6.3.3 4-Level Inputs
      4. 6.3.4 Receiver Linear Equalization
    4. 6.4 Device Functional Modes
      1. 6.4.1 Device Configuration in GPIO mode
      2. 6.4.2 Device Configuration in I2C Mode
      3. 6.4.3 DisplayPort Mode
      4. 6.4.4 Custom Alternate Mode
      5. 6.4.5 Linear EQ Configuration
      6. 6.4.6 Adjustable VOD Linear Range and DC Gain
      7. 6.4.7 USB3.1 Modes
    5. 6.5 Programming
      1. 6.5.1 Use The Following Procedure to Write to TUSB1044 I2C Registers:
      2. 6.5.2 Use The Following Procedure to Read the TUSB1044 I2C Registers:
      3. 6.5.3 Use The Following Procedure for Setting a Starting Sub-Address for I2C Reads:
    6. 6.6 Register Maps
      1. 6.6.1 TUSB1044 Registers
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
      3. 7.2.3 Application Curve
    3. 7.3 System Examples
      1. 7.3.1 USB 3.1 only (USB/DP Alternate Mode)
      2. 7.3.2 USB3.1 and 2 lanes of DisplayPort
      3. 7.3.3 DisplayPort Only
      4. 7.3.4 USB 3.1 only (USB/Custom Alternate Mode)
      5. 7.3.5 USB3.1 and 1 Lane of Custom Alt Mode
      6. 7.3.6 USB3.1 and 2 Lane of Custom Alt Mode
      7. 7.3.7 USB3.1 and 4 Lane of Custom Alt Mode
    4. 7.4 Power Supply Recommendations
    5. 7.5 Layout
      1. 7.5.1 Layout Guidelines
      2. 7.5.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Documentation Support
      1. 8.1.1 Related Documentation
    2. 8.2 ドキュメントの更新通知を受け取る方法
    3. 8.3 サポート・リソース
    4. 8.4 Trademarks
    5. 8.5 静電気放電に関する注意事項
    6. 8.6 用語集
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

6.3.4 Receiver Linear Equalization

The purpose of receiver equalization is to compensate for channel insertion loss and inter-symbol interference in the system. The receiver overcomes these losses by attenuating the low frequency components of the signals with respect to the high frequency components. The proper gain setting should be selected to match the channel insertion loss. Two 4-level input pins enable up to 16 possible equalization settings. The upstream path, and the downstream path each have their own two 4-level inputs for equalization settings; UEQ[1:0] and DEQ[1:0] respectively. The TUSB1044 also provides the flexibility of adjusting equalization settings through I2C registers URX[2:1]EQ_SEL, UTX[2:1]EQ_SEL, DRX[2:1]EQ_SEL, and DTX[2:1]EQ_SEL for each individual channel and for each direction (upstream or downstream).