JAJSEP3C September   2017  – March 2018 LMZM33603

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
    1.     概略回路図
  3. 3 概要
    1.     安全動作領域
  4. 4 改訂履歴
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics (VIN = 5 V)
    8. 6.8 Typical Characteristics (VIN = 12 V)
    9. 6.9 Typical Characteristics (VIN = 24 V)
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Adjusting the Output Voltage
      2. 7.3.2  Feed-Forward Capacitor, CFF
      3. 7.3.3  Output Current vs Output Voltage
      4. 7.3.4  Voltage Dropout
      5. 7.3.5  Switching Frequency (RT)
      6. 7.3.6  Synchronization (SYNC)
      7. 7.3.7  Input Capacitors
      8. 7.3.8  Output Capacitors
      9. 7.3.9  Output On/Off Enable (EN)
      10. 7.3.10 Programmable Undervoltage Lockout (UVLO)
      11. 7.3.11 Power Good (PGOOD)
      12. 7.3.12 Overcurrent Protection (OCP)
      13. 7.3.13 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Active Mode
      2. 7.4.2 Shutdown Mode
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Custom Design With WEBENCH® Tools
        2. 8.2.2.2 Output Voltage Setpoint
        3. 8.2.2.3 Feed-Forward Capacitor (CFF)
        4. 8.2.2.4 Setting the Switching Frequency
        5. 8.2.2.5 Input Capacitors
        6. 8.2.2.6 Output Capacitor Selection
        7. 8.2.2.7 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Examples
    3. 10.3 Theta JA vs PCB Area
    4. 10.4 EMI
      1. 10.4.1 EMI Plots
    5. 10.5 Package Specifications
  11. 11デバイスおよびドキュメントのサポート
    1. 11.1 デバイス・サポート
      1. 11.1.1 デベロッパー・ネットワークの製品に関する免責事項
      2. 11.1.2 WEBENCH®ツールによるカスタム設計
    2. 11.2 関連資料
    3. 11.3 ドキュメントの更新通知を受け取る方法
    4. 11.4 コミュニティ・リソース
    5. 11.5 商標
    6. 11.6 静電気放電に関する注意事項
    7. 11.7 Glossary
  12. 12メカニカル、パッケージ、および注文情報

7.3.10 Programmable Undervoltage Lockout (UVLO)

The LMZM33603 implements internal UVLO circuitry on the VIN pin. The device is disabled when the VIN pin voltage falls below the internal VIN UVLO threshold. The internal VIN UVLO rising threshold is 3.9 V (maximum) with a typical hysteresis of 300 mV.

If an application requires a higher UVLO threshold, a resistor divider can be placed on the EN/SYNC pin as shown in Figure 31. Table 7 lists recommended resistor values for RENT and RENB to adjust the UVLO voltage.

To insure proper start-up and reduce input current surges, the UVLO threshold must be set to at least (VOUT + 1.5 V) for output voltages ≤ 5 V and at least (1.3 × VOUT) for output voltages > 5 V. TI recommends to set the UVLO threshold to approximately 80% to 85% of the minimum expected input voltage.

LMZM33603 ZZtopUVLO3.gifFigure 31. Adjustable UVLO

Table 7. Resistor Values for Adjusting UVLO

UVLO (V) 6.5 10 15 20 25 30
RENT (kΩ) 100 100 100 100 100 100
RENB (kΩ) 35.7 20.5 12.7 9.31 7.32 6.04