JAJSER6C February   2018  – March 2023 LMZM23600

PRODUCTION DATA  

  1. 特長
  2. アプリケーション
  3. 概要
  4. Revision History
  5. Device Comparison
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 System Characteristics
    7. 7.7 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Control Scheme
      2. 8.3.2 Soft-Start Function
      3. 8.3.3 Enable and External UVLO Function
      4. 8.3.4 Current Limit
      5. 8.3.5 Hiccup Mode
      6. 8.3.6 Power Good (PGOOD) Function
      7. 8.3.7 MODE/SYNC Function
        1. 8.3.7.1 Forced PWM Mode
        2. 8.3.7.2 Auto PFM Mode
        3. 8.3.7.3 Dropout Mode
        4. 8.3.7.4 SYNC Operation
      8. 8.3.8 Thermal Protection
    4. 8.4 Device Functional Modes
      1. 8.4.1 Shutdown
      2. 8.4.2 FPWM Operation
      3. 8.4.3 Auto PFM Mode Operation
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 Design Requirements
        1. 9.2.1.1 Maximum Input Voltage for VOUT < 2.5 V
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Custom Design With WEBENCH® Tools
        2. 9.2.2.2 Input Capacitor Selection
        3. 9.2.2.3 Output Capacitor Selection
        4. 9.2.2.4 Feedback Voltage Divider for Adjustable Output Voltage Versions
        5. 9.2.2.5 RPU - PGOOD Pullup Resistor
        6. 9.2.2.6 VIN Divider and Enable
      3. 9.2.3 Application Curves
        1. 9.2.3.1 VOUT = 5 V
        2. 9.2.3.2 VOUT = 3.3 V
        3. 9.2.3.3 VOUT = 12 V
        4. 9.2.3.4 VOUT = 15 V
        5. 9.2.3.5 VOUT = 2.5 V
        6. 9.2.3.6 VOUT = 1.2 V and VOUT = 1.8 V
        7. 9.2.3.7 VOUT = 5 V and 3.3 V Fixed Output Options
    3. 9.3 Best Design Practices
    4. 9.4 Power Supply Recommendations
      1. 9.4.1 Supply Voltage Range
      2. 9.4.2 Supply Current Capability
      3. 9.4.3 Supply Input Connections
        1. 9.4.3.1 Voltage Drops
        2. 9.4.3.2 Stability
    5. 9.5 Layout
      1. 9.5.1 Layout Guidelines
        1. 9.5.1.1 Thermal Design
      2. 9.5.2 Layout Examples
  10. 10Device and Documentation Support
    1. 10.1 Device Support
      1. 10.1.1 サード・パーティ製品に関する免責事項
      2. 10.1.2 Development Support
        1. 10.1.2.1 Custom Design With WEBENCH® Tools
    2. 10.2 Documentation Support
      1. 10.2.1 Related Documentation
    3. 10.3 ドキュメントの更新通知を受け取る方法
    4. 10.4 サポート・リソース
    5. 10.5 Trademarks
    6. 10.6 静電気放電に関する注意事項
    7. 10.7 用語集
  11. 11Mechanical, Packaging, and Orderable Information
    1. 11.1 Tape and Reel Information

Forced PWM Mode

When constant frequency operation is more important than light load efficiency, the MODE/SYNC input of the LMZM23600 device must be pulled high or a valid synchronization input must be provided. This activates forced-PWM-mode operation. After activated, this feature ensures that the switching frequency stays constant across the entire load current range, while operating between the minimum and maximum duty cycle limits. The diode emulation feature is turned off in this mode. This means that the device remains in CCM under light loads. The switching frequency in forced PWM mode is only reduced when the input voltage-to-output voltage ratio results in minimum on-time limitation (ADJ version only) or minimum off-time limitation near dropout.

This feature can be activated and deactivated while the part is regulating without removing the load. This feature activates and deactivates gradually, preventing perturbation of output voltage. When in FPWM mode, a limited reverse current is allowed through the inductor allowing power to pass from the regulators output to its input.