JAJSFC6C May 2015 – April 2018 ADS52J90
PRODUCTION DATA.
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
GAIN_ADC3o | 0 | OFFSET_ADC3o | |||||
R/W-0h | R/W-0h | R/W-0h | |||||
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
OFFSET_ADC3o | |||||||
R/W-0h |
LEGEND: R/W = Read/Write; -n = value after reset |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
15-11 | GAIN_ADC3o | R/W | 0h | When the DIG_GAIN_EN bit (register 3, bit 12) is set to 1, the digital gain value for the odd sample of ADC3 can be obtained with this register. For a value of N (decimal equivalent of binary) written to these bits, the digital gain gets set to N × 0.2 dB. |
10 | 0 | R/W | 0h | Must write 0 |
9-0 | OFFSET_ADC3o | R/W | 0h | When the DIG_OFFSET_EN bit (register 3, bit 8) is set to 1, the offset value to be subtracted from the odd sample of ADC3 can be obtained with this 10-bit register. The offset value is in twos complement format and its LSB corresponds to a 14-bit LSB. |