JAJSFE6I July 2009 – May 2018 TPS65070 , TPS65072 , TPS65073 , TPS650731 , TPS650732
UNLESS OTHERWISE NOTED, this document contains PRODUCTION DATA.
Charge termination can be disabled by setting the Bit CHARGE TERMINATION ON/OFF in register CHGCONFIG1 to logic high. When termination is disabled, the device goes through the precharge, fast-charge and CV phases, then remains in the CV phase – the charger behaves like an LDO with an output voltage equal to VBAT(REG), able to source current up to ICHG or IIN-MAX, whichever is lesser. Battery detection is not performed.