JAJSFG3C may 2018 – may 2023 ADC12DL3200
PRODUCTION DATA
The TMSTP+ and TMSTP– differential inputs can be used as a timestamp input to mark a specific sample based on the timing of an external trigger event relative to the sampled signal. TIME_STAMP_EN (see the LSB control bit output register) must be set in order to use the timestamp feature and output the timestamp data. When enabled, the LSB of the 12-bit ADC digital output reports the status of the TMSTP± input. In effect, the 12-bit output sample consists of the upper 11-bits of the 12-bit converter and the LSB of the 12-bit output sample is the output of a parallel 1-bit converter (TMSTP±) with the same latency as the ADC core. The trigger must be applied to the differential TMSTP+ and TMSTP– inputs. The trigger can be asynchronous to the ADC sampling clock and is sampled at approximately the same time as the analog input. Alternatively, the SYSREF± inputs can be used as the timestamp input when SYSREF_TIME_STAMP_EN is set to 1 in the CLK_CTRL1 register.