JAJSFO7D March 2008 – November 2023 UCC27324-Q1
PRODUCTION DATA
Figure 7-5 shows the circuit performance achievable with a single driver (half of the 8-pin device) driving a 10-nF load. The input pulse width (not shown) is set to 300 ns to show both transitions in the output waveform. The rising and falling edges of the switching waveforms are fairly linear which is because of the constant output current characteristic of the driver as opposed to the resistive output impedance of traditional MOSFET-based gate drivers.
Sink and source currents of the driver are dependent upon the VDD value and the output capacitive load. The larger the VDD value the higher the current capability, and the larger the capacitive load the higher the current sink/source capability. Trace resistance and inductance, including wires and cables for testing, slows down the rise and fall times of the outputs which reduces the current capabilities of the driver. To achieve higher current results, reduce resistance and inductance on the board as much as possible and increase the capacitive output load value to swap out the effect of the inductance values.