JAJSFQ3A July   2018  – September 2019 TPS56637

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
    1.     Device Images
      1.      概略回路図
      2.      効率と出力電流との関係 VOUT = 5V
  4. 4 改訂履歴
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 Handling Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  The Adaptive On-Time Control and PWM Operation
      2. 7.3.2  Mode Selection
        1. 7.3.2.1 Eco-mode™ Control Scheme
        2. 7.3.2.2 FCCM Control
      3. 7.3.3  Soft Start and Pre-Biased Soft Start
      4. 7.3.4  Enable and Adjusting Undervoltage Lockout
      5. 7.3.5  Output Overcurrent Limit and Undervoltage Protection
      6. 7.3.6  Overvoltage Protection
      7. 7.3.7  UVLO Protection
      8. 7.3.8  Thermal Shutdown
      9. 7.3.9  Output Voltage Discharge
      10. 7.3.10 Power Good
    4. 7.4 Device Functional Modes
      1. 7.4.1 Standby Operation
      2. 7.4.2 Normal Operation
      3. 7.4.3 Light Load Operation
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Output Voltage Resistors Selection
        2. 8.2.2.2 Output Filter Selection
        3. 8.2.2.3 Input Capacitor Selection
        4. 8.2.2.4 Bootstrap Capacitor Selection
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11デバイスおよびドキュメントのサポート
    1. 11.1 ドキュメントのサポート
      1. 11.1.1 関連資料
    2. 11.2 ドキュメントの更新通知を受け取る方法
    3. 11.3 コミュニティ・リソース
    4. 11.4 商標
    5. 11.5 静電気放電に関する注意事項
    6. 11.6 Glossary
  12. 12メカニカル、パッケージ、および注文情報
    1. 12.1 Package Option Addendum
      1. 12.1.1 Packaging Information
      2. 12.1.2 Tape and Reel Information

7.3.10 Power Good

The TPS56637 has a built in power good (PG) function to indicate whether the output voltage has reached its appropriate level or not. The PG signal can be used for startup sequencing of multiple rails. The PG pin is an open-drain output that requires a pull-up resistor (to any voltage below 5.5 V). A pull-up resistor of 100kΩ is recommended to pull it up to 5V voltage. It can sink 1.5mA of current and maintain its specified logic low level. Once the FB pin voltage is between 90% and 110% of the internal reference voltage (VREF) and after a deglitch time of 64µs, the PG turns to high impedance status. The PG pin is pulled low after a deglitch time of 32µs when FB pin voltage is lower than 85% of the internal reference voltage or greater than 115% of the internal reference voltage, or in events of thermal shutdown, EN shutdown, UVLO conditions. VIN must remain present for the PG pin to stay Low.

Table 2. Power Good Pin Logic Table (TPS56637)

Device State PG Logic Status
High Impedance Low
Enable (EN=High) VFB doesn't trigger VPGTH √
VFB triggers VPGTH √
Shutdown (EN=Low) √
UVLO 2 V < VIN < VUVLO √
Thermal Shutdown TJ > TSD √
Power Supply Removal VIN < 2 V √