JAJSFQ6E March   2014  – July 2018 TPS92601-Q1 , TPS92602-Q1

UNLESS OTHERWISE NOTED, this document contains PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
    1.     Device Images
      1.      代表的な回路図
  4. 4 改訂履歴
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Fixed-Frequency PWM Control
      2. 7.3.2 Slope-Compensation Output Current
      3. 7.3.3 Boost-Current Limit
      4. 7.3.4 Oscillator and PLL
      5. 7.3.5 Control Loop Compensation
      6. 7.3.6 LED Open-Circuit Detection
      7. 7.3.7 Output Short-Circuit and Overcurrent Detection
      8. 7.3.8 Measuring LED Current During a Non-Failure Condition
      9. 7.3.9 LED Dimming Options
        1. 7.3.9.1 Analog Dimming
        2. 7.3.9.2 PWM Dimming
    4. 7.4 Device Functional Modes
      1. 7.4.1 Undervoltage and Overvoltage Shutdown
      2. 7.4.2 Overtemperature Shutdown
      3. 7.4.3 Device State Diagram
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Boost Regulator With Separate or Paralleled Channels
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1  Switching Frequency
          2. 8.2.1.2.2  Maximum Output-Current Set Point
          3. 8.2.1.2.3  Output Overvoltage-Protection Set Point
          4. 8.2.1.2.4  Duty Cycle Estimation
          5. 8.2.1.2.5  Inductor Selection
          6. 8.2.1.2.6  Rectifier Diode Selection
          7. 8.2.1.2.7  Output Capacitor Selection
          8. 8.2.1.2.8  Input Capacitor Selection
          9. 8.2.1.2.9  Current Sense and Current Limit
          10. 8.2.1.2.10 Switching MOSFET Selection
          11. 8.2.1.2.11 Loop Compensation
        3. 8.2.1.3 Application Curves
      2. 8.2.2 Boost-to-Battery Regulator
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
          1. 8.2.2.2.1  Switching Frequency
          2. 8.2.2.2.2  Maximum Output-Current Set Point
          3. 8.2.2.2.3  Output Overvoltage-Protection Set Point
          4. 8.2.2.2.4  Duty Cycle Estimation
          5. 8.2.2.2.5  Inductor Selection
          6. 8.2.2.2.6  Rectifier Diode Selection
          7. 8.2.2.2.7  Output Capacitor Selection
          8. 8.2.2.2.8  Input Capacitor Selection
          9. 8.2.2.2.9  Current Sense and Current Limit
          10. 8.2.2.2.10 Switching MOSFET Selection
          11. 8.2.2.2.11 Loop Compensation
        3. 8.2.2.3 TPS92602y-Q1 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11デバイスおよびドキュメントのサポート
    1. 11.1 関連リンク
    2. 11.2 商標
    3. 11.3 静電気放電に関する注意事項
    4. 11.4 Glossary
  12. 12メカニカル、パッケージ、および注文情報

6.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human-body model (HBM), per AEC Q100-002(1) ±2000 V
Charged-device model (CDM), per AEC Q100-011 Other pins ±500
Corner pins (1, 14, 15, 28 for TPS92602x-Q1; 1, 10, 11, 20 for TPS92601x-Q1) ±750
(1) AEC Q100-002 indicates HBM stressing is done in accordance with the ANSI/ESDA/JEDEC JS-001 specification.