JAJSFU2C October   2013  – January 2021 TPS62085 , TPS62086 , TPS62087

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 Device Options
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Power Save Mode
      2. 8.3.2 100% Duty Cycle Low Dropout Operation
      3. 8.3.3 Soft Start
      4. 8.3.4 Switch Current Limit and Hiccup Short-Circuit Protection
      5. 8.3.5 Undervoltage Lockout
      6. 8.3.6 Thermal Shutdown
    4. 8.4 Device Functional Modes
      1. 8.4.1 Enable and Disable
      2. 8.4.2 Power Good
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Custom Design With WEBENCH® Tools
        2. 9.2.2.2 Setting The Output Voltage
        3. 9.2.2.3 Output Filter Design
        4. 9.2.2.4 Inductor Selection
        5. 9.2.2.5 Capacitor Selection
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
    3. 11.3 Thermal Considerations
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Development Support
        1. 12.1.1.1 Custom Design With WEBENCH® Tools
    2. 12.2 Documentation Support
      1. 12.2.1 Related Documentation
    3. 12.3 ドキュメントの更新通知を受け取る方法
    4. 12.4 サポート・リソース
    5. 12.5 Trademarks
    6. 12.6 静電気放電に関する注意事項
    7. 12.7 用語集

8.4.2 Power Good

The TPS62085, TPS62086, and TPS62087 have a power good output. The power good goes high impedance once the output is above 95% of the nominal voltage, and is driven low once the output voltage falls below typically 90% of the nominal voltage. The PG pin is an open-drain output and is specified to sink up to 1 mA. The power good output requires a pullup resistor connecting to any voltage rail less than 6 V. The PG signal can be used for sequencing of multiple rails by connecting it to the EN pin of other converters. Leave the PG pin unconnected when not used. Table 8-1 shows the PG pin logic.

Table 8-1 PG Pin Logic
DEVICE CONDITIONSLOGIC STATUS
HIGH ZLOW
EnableEN = High, VFB ≥ VPG√
EN = High, VFB < VPG√
ShutdownEN = Low√
Thermal ShutdownTJ > TJSD√
UVLO0.5 V < VIN < VUVLO√
Power Supply RemovalVIN ≤ 0.5 V√