JAJSFV3A July   2018  – December 2018 DSLVDS1001

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
    1.     機能図
    2.     代表的なアプリケーション
  4. 4 改訂履歴
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 DSLVDS1001 Driver Functionality
      2. 8.3.2 Driver Output Voltage and Power-On Reset
      3. 8.3.3 Driver Offset
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Point-to-Point Communications
    3. 9.3 Design Requirements
    4. 9.4 Detailed Design Procedure
      1. 9.4.1 Driver Supply Voltage
      2. 9.4.2 Driver Bypass Capacitance
      3. 9.4.3 Driver Input Voltage
      4. 9.4.4 Driver Output Voltage
      5. 9.4.5 Interconnecting Media
      6. 9.4.6 PCB Transmission Lines
      7. 9.4.7 Termination Resistor
    5. 9.5 Application Curve
  10. 10Power Supply Recommendations
    1. 10.1 Power Supply Considerations
  11. 11Layout
    1. 11.1 Layout Guidelines
      1. 11.1.1 Microstrip vs. Stripline Topologies
      2. 11.1.2 Dielectric Type and Board Construction
      3. 11.1.3 Recommended Stack Layout
      4. 11.1.4 Separation Between Traces
      5. 11.1.5 Crosstalk and Ground Bounce Minimization
      6. 11.1.6 Decoupling
    2. 11.2 Layout Example
  12. 12デバイスおよびドキュメントのサポート
    1. 12.1 ドキュメントのサポート
      1. 12.1.1 関連資料
    2. 12.2 ドキュメントの更新通知を受け取る方法
    3. 12.3 コミュニティ・リソース
    4. 12.4 商標
    5. 12.5 静電気放電に関する注意事項
    6. 12.6 Glossary
  13. 13メカニカル、パッケージ、および注文情報

6.5 Electrical Characteristics

Over Recommended Supply Voltage and Operating Temperature ranges, unless otherwise specified.(1)(2)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
|VOD| Output Differential Voltage RL = 100 Ω
(Figure 7)
OUT+, OUT– Pins		 250 350 450 mV
ΔVOD VOD Magnitude Change RL = 100 Ω
(Figure 8)
OUT+, OUT– Pins		 3 35 mV
VOS Offset Voltage RL = 100 Ω
(Figure 7)
OUT+, OUT– Pins		 1.125 1.25 1.375 V
ΔVOS Offset Magnitude Change RL = 100 Ω
(Figure 7)
OUT+, OUT– Pins		 25 mV
IOFF Power-off Leakage VOUT = 3.6 V or GND, VDD = 0 V
OUT+, OUT– Pins		 ±2 ±15 μA
IOS Output Short Circuit Current(3) VOUT+ and VOUT− = 0 V
OUT+, OUT– Pins		 −5 −20 mA
IOSD Differential Output Short Circuit Current(3) VOD = 0 V
OUT+, OUT– Pins		 −5 −12 mA
VIH Input High Voltage TTL IN Pin 2 VDD V
VIL Input Low Voltage TTL IN Pin GND 0.8 V
IIH Input High Current VIN = 3.3 V or 2.4 V
TTL IN Pin		 ±2 ±15 μA
IIL Input Low Current VIN = GND or 0.5 V
TTL IN Pin		 ±2 ±15 μA
CIN Input Capacitance TTL IN Pin 3 pF
IDD Power Supply Current No Load VIN = VDD or GND 5 8 mA
RL = 100 Ω VIN = VDD or GND 7 10
(1) Current into device pins is defined as positive. Current out of device pins is defined as negative. All voltages are referenced to ground except VOD.
(2) All typicals are given for: VDD = +3.3 V and TA = +25°C.
(3) Output short circuit current (IOS) is specified as magnitude only, minus sign indicates direction only.