JAJSFV3A July 2018 – December 2018 DSLVDS1001
PRODUCTION DATA.
The DSLVDS1001 device is a single-channel, low-voltage differential signaling (LVDS) line driver. It operates from a single supply that is nominally 3.3-V, but can be as low as 3-V and as high as 3.6-V. The input signal to the DSLVDS1001 is an LVCMOS/LVTTL signal. The output of the device is a differential signal complying with the LVDS standard (TIA/EIA-644). The differential output signal operates with a signal level of 350 mV, nominally, at a common-mode voltage of 1.2 V. This low differential output voltage results in low emmsions durning electromagnetic compatability (EMC) testing. The differential nature of the output provides immunity to common-mode coupled signals that the driven signal may experience. The DSLVDS1001 device is intended to drive a 100-Ω transmission line. This transmission line may be a printed-circuit board (PCB) or cabled interconnect. With transmission lines, the optimum signal quality and power delivery is reached when the transmission line is terminated with a load equal to the characteristic impedance of the interconnect. Likewise, the driven 100-Ω transmission line should be terminated with a matched resistance.