JAJSFY4C August   2018  – October 2019 LMR36015-Q1

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
    1.     Device Images
      1.      概略回路図
  4. 4 改訂履歴
  5. 5 概要（続き）
  6. 6 Device Comparison Table
  7. 7 Pin Configuration and Functions
    1.     Pin Functions
  8. 8 Specifications
    1. 8.1 Absolute Maximum Ratings
    2. 8.2 ESD Ratings
    3. 8.3 Recommended Operating Conditions
    4. 8.4 Thermal Information
    5. 8.5 Electrical Characteristics
    6. 8.6 Timing Requirements
    7. 8.7 System Characteristics
    8. 8.8 Typical Characteristics
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Power-Good Flag Output
      2. 9.3.2 Enable and Start-up
      3. 9.3.3 Current Limit and Short Circuit
      4. 9.3.4 Undervoltage Lockout and Thermal Shutdown
    4. 9.4 Device Functional Modes
      1. 9.4.1 Auto Mode
      2. 9.4.2 Forced PWM Operation
      3. 9.4.3 Dropout
      4. 9.4.4 Minimum Switch On-Time
      5. 9.4.5 Spread Spectrum Operation
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design 1: Low Power 24-V, 1.5-A PFM Converter
        1. 10.2.1.1 Design Requirements
        2. 10.2.1.2 Detailed Design Procedure
          1. 10.2.1.2.1  Custom Design With WEBENCH Tools
          2. 10.2.1.2.2  Choosing the Switching Frequency
          3. 10.2.1.2.3  Setting the Output Voltage
            1. 10.2.1.2.3.1 FB for Adjustable Output
          4. 10.2.1.2.4  Inductor Selection
          5. 10.2.1.2.5  Output Capacitor Selection
          6. 10.2.1.2.6  Input Capacitor Selection
          7. 10.2.1.2.7  CBOOT
          8. 10.2.1.2.8  VCC
          9. 10.2.1.2.9  CFF Selection
            1. 10.2.1.2.9.1 External UVLO
          10. 10.2.1.2.10 Maximum Ambient Temperature
      2. 10.2.2 Application Curves
      3. 10.2.3 Design 2: High Density 12-V, 1.5-A FPWM Converter
        1. 10.2.3.1 Design Requirements
        2. 10.2.3.2 Detailed Design Procedure
        3. 10.2.3.3 Application Curves
    3. 10.3 What to Do and What Not to Do
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
      1. 12.1.1 Ground and Thermal Considerations
    2. 12.2 Layout Example
  13. 13デバイスおよびドキュメントのサポート
    1. 13.1 デバイス・サポート
      1. 13.1.1 開発サポート
        1. 13.1.1.1 WEBENCH®ツールによるカスタム設計
    2. 13.2 ドキュメントのサポート
      1. 13.2.1 関連資料
    3. 13.3 ドキュメントの更新通知を受け取る方法
    4. 13.4 サポート・リソース
    5. 13.5 商標
    6. 13.6 静電気放電に関する注意事項
    7. 13.7 Glossary
  14. 14メカニカル、パッケージ、および注文情報

10.2 Typical Application

Figure 18 and Figure 19 show typical application circuits for the LMR36015-Q1. This device is designed to function over a wide range of external components and system parameters. However, the internal compensation is optimized for a certain range of external inductance and output capacitance. As a quick start guide, Table 3 provides typical component values for a range of the most common output voltages.

LMR36015-Q1 general_apps_circuit_15q1-ADJ-output.gifFigure 18. Example Applications Circuit (Adjustable Output)
LMR36015-Q1 general_apps_circuit_15q1-fixed-output.gifFigure 19. Example Applications Circuit (Fixed 3.3 V Output)

Table 3. Typical External Component Values

ƒSW (kHz) VOUT (V) L (µH) Nominal COUT (rated capacitance) (1) Minimum COUT (rated capacitance) (2) RFBT (Ω) RFBB (Ω) CIN CFF
400 3.3 10 2 × 47 µF 2 × 22 µF 100 k 43.2 k 4.7 µF + 2 × 220 nF 20 pF
2100 3.3 2.2 3 × 22 µF 2 × 15 µF 100 k 43.2 k 4.7 µF + 2 × 220 nF 20 pF
400 5 15 3 × 22 µF 2 × 22 µF 100 k 24.9 k 4.7 µF + 2 × 220 nF 20 pF
2100 5 2.2 2 × 22 µF 2 × 15 µF 100 k 24.9 k 4.7 µF + 2 × 220 nF 20 pF
400 12 27 3 × 22 µF 2 × 22 µF 100 k 9.09 k 4.7 µF + 2 × 220 nF 20 pF
2100 12 6.8 2 × 22 µF 2 × 15 µF 100 k 9.09 k 4.7 µF + 2 × 220 nF 20 pF
(1) Optimized for superior load transient performance from 0 to 100% rated load.
(2) Optimized for size constrained end applications.