JAJSFY4C August   2018  – October 2019 LMR36015-Q1

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
    1.     Device Images
      1.      概略回路図
  4. 4 改訂履歴
  5. 5 概要（続き）
  6. 6 Device Comparison Table
  7. 7 Pin Configuration and Functions
    1.     Pin Functions
  8. 8 Specifications
    1. 8.1 Absolute Maximum Ratings
    2. 8.2 ESD Ratings
    3. 8.3 Recommended Operating Conditions
    4. 8.4 Thermal Information
    5. 8.5 Electrical Characteristics
    6. 8.6 Timing Requirements
    7. 8.7 System Characteristics
    8. 8.8 Typical Characteristics
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Power-Good Flag Output
      2. 9.3.2 Enable and Start-up
      3. 9.3.3 Current Limit and Short Circuit
      4. 9.3.4 Undervoltage Lockout and Thermal Shutdown
    4. 9.4 Device Functional Modes
      1. 9.4.1 Auto Mode
      2. 9.4.2 Forced PWM Operation
      3. 9.4.3 Dropout
      4. 9.4.4 Minimum Switch On-Time
      5. 9.4.5 Spread Spectrum Operation
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design 1: Low Power 24-V, 1.5-A PFM Converter
        1. 10.2.1.1 Design Requirements
        2. 10.2.1.2 Detailed Design Procedure
          1. 10.2.1.2.1  Custom Design With WEBENCH Tools
          2. 10.2.1.2.2  Choosing the Switching Frequency
          3. 10.2.1.2.3  Setting the Output Voltage
            1. 10.2.1.2.3.1 FB for Adjustable Output
          4. 10.2.1.2.4  Inductor Selection
          5. 10.2.1.2.5  Output Capacitor Selection
          6. 10.2.1.2.6  Input Capacitor Selection
          7. 10.2.1.2.7  CBOOT
          8. 10.2.1.2.8  VCC
          9. 10.2.1.2.9  CFF Selection
            1. 10.2.1.2.9.1 External UVLO
          10. 10.2.1.2.10 Maximum Ambient Temperature
      2. 10.2.2 Application Curves
      3. 10.2.3 Design 2: High Density 12-V, 1.5-A FPWM Converter
        1. 10.2.3.1 Design Requirements
        2. 10.2.3.2 Detailed Design Procedure
        3. 10.2.3.3 Application Curves
    3. 10.3 What to Do and What Not to Do
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
      1. 12.1.1 Ground and Thermal Considerations
    2. 12.2 Layout Example
  13. 13デバイスおよびドキュメントのサポート
    1. 13.1 デバイス・サポート
      1. 13.1.1 開発サポート
        1. 13.1.1.1 WEBENCH®ツールによるカスタム設計
    2. 13.2 ドキュメントのサポート
      1. 13.2.1 関連資料
    3. 13.3 ドキュメントの更新通知を受け取る方法
    4. 13.4 サポート・リソース
    5. 13.5 商標
    6. 13.6 静電気放電に関する注意事項
    7. 13.7 Glossary
  14. 14メカニカル、パッケージ、および注文情報

11 Power Supply Recommendations

The characteristics of the input supply must be compatible with the Specifications found in this data sheet. In addition, the input supply must be capable of delivering the required input current to the loaded regulator. The average input current can be estimated with Equation 12.

Equation 12. LMR36015-Q1 IIN_eq1.gif

where

  • η is the efficiency

If the regulator is connected to the input supply through long wires or PCB traces, special care is required to achieve good performance. The parasitic inductance and resistance of the input cables can have an adverse effect on the operation of the regulator. The parasitic inductance, in combination with the low-ESR, ceramic input capacitors, can form an underdamped resonant circuit, resulting in overvoltage transients at the input to the regulator. The parasitic resistance can cause the voltage at the VIN pin to dip whenever a load transient is applied to the output. If the application is operating close to the minimum input voltage, this dip may cause the regulator to momentarily shutdown and/or reset. The best way to solve these kind of issues is to reduce the distance from the input supply to the regulator and/or use an aluminum or tantalum input capacitor in parallel with the ceramics. The moderate ESR of these types of capacitors help to damp the input resonant circuit and reduce any overshoots. A value in the range of 20 µF to 100 µF is usually sufficient to provide input damping and help to hold the input voltage steady during large load transients.

Sometimes, for other system considerations, an input filter is used in front of the regulator. This can lead to instability, as well as some of the effects mentioned above, unless it is designed carefully. The AN-2162 Simple Success With Conducted EMI From DCDC Converters User's Guide provides helpful suggestions when designing an input filter for any switching regulator.

In some cases a transient voltage suppressor (TVS) is used on the input of regulators. One class of this device has a snap-back characteristic (thyristor type). The use of a device with this type of characteristic is not recommended. When the TVS fires, the clamping voltage falls to a very low value. If this voltage is less than the output voltage of the regulator, the output capacitors discharge through the device back to the input. This uncontrolled current flow may damage the device.